Basic high frequency signal delay/phase/trace length doubts

[DavidAlfa]

I'm not used to route very high frequency signals, so I have few questions.
I understand that any lenght mismatch between traces will cause phase shifting (delay) between them when reaching the target.
As the frequency rises, lambda shortens and the issue becomes more and more critical.

Let's take an error of 20mm, which I already consider a lot.
- The theorical delay (at light speed) would be 66.7ps.
- FR4 boards have a velocity factor of 0.47, so the delay will be actually 66.7/0.47=142ps ?
- For 400MHZ: T=2500ps, the phase shift would be 360*(142/2500)=20.45º ?

I'm thinking on doing some crazy hacking to an old linux board, extending the DDR2 memory bus to 4 ram chips, interfacing the existing bga bads.


I know, I know, this is nuts, It's just I like the pain and the suffering

[jwet]

I didn't see a question really but your analysis is spot on.  A 20 mm length mismatch is super conservative- its easy to maintain a few mm without getting crazy.