Hello everyone, I am trying to design a PLL with the 74S124 VCO. The datasheet I found for this chip doesn't give any information on how the chip works, and I'm having trouble with one section affecting the other (there are two oscillators in each chip) even when one oscillator is disabled. Does anyone know how the chip works or have the internal schematics? I want to know what happens if I force the frequency control inputs to ground (the datasheet says the minimum voltage on these pins is 1v) or what happens if I short the timing capacitor pins on one side. The enable inputs simply disable the output of the oscillators, but it doesn't really stop them which is what I want to do. I would experiment to find out myself but I only have a few chips and I suspect forcing the pins to ground would damage the chip. Please feel free to suggest other methods and chips for my PLL. I am trying to synthesize a 10.7MHz FM signal to tune the IF section of FM radio receivers. I tried simply tuning the oscillators to 10.7MHz without a PLL circuit but the results were not good at all.