OLD thread update:Please let me know if my very-high-power load has a fatal flaw

[schmitt trigger]

  Protection circuits may or may not be coming.  I am thinking about a thermal overload that will at least pull the gate drive away from all the FETs if I somehow get distracted and things get too warm.  I'll think about fuses, but I don't even know what I might do with a voltage clamp, what do you mean by that?

You must be familiar with Murphy's law.
In colloquial English it says: Sh!t happens.

Include at the very least some fuses.

[Davidwasalreadytaken]

@ Kleinstein I simulated a diode from the gate drive to ground and sure enough the opamp is trying its (feeble) best but the gate never gets enough juice to turn on.  Brute force indeed, but it looks like a simple and effective way to implement a system to switch the load off.  I modeled it and the mosfet was passing nanoamperes of current, which is effectively zero for my purpose!  The LT1007 is rated for continuous short-circuit so . . . it's not very elegant and I don't fancy driving a part at the maximum output even if it can take it . . .  but I anticipate not using it for very long.  I suppose I can call that a good-enough way to solve this particular problem.

I think it would be a good idea to run a diode from each gate drive to ground, interrupted by a single switch.  Unless I have taken too many crazy pills today, that would be an effective hard OFF switch.

@ Vovk_Z thanks for the confirmation.  Space is definitely available in this case!

@ Jay_Diddy_B on that thread I saw the scheme proposed by MarkF, here: https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/msg2725130/#msg2725130  using a separate circuit to supply a small amount of current to give some current through the sense resistors.  The way I use my loads, they are always turned down at the first, so that would also work for me I think.  I'll scratch my head about this over the weekend.

@ scmitt trigger you will be happy to know I have added fuse holders for the source connections of each mosfet, which uglies up the design a little in practice but should prevent something really nasty happening in the event of unforseen circumstance.  I am still toying with the idea of adding fuses on the gate drives but we'll see how that goes.

Thanks again to all for your consideration and valuable contributions

[free_electron]

if you are going to build that HP schematic: that opamp driving the fets has some weird characteristics. i built  a number of these hp clones. i never could get it to work properly without using that exact opamp ..

[Davidwasalreadytaken]

The main thing I got from that is the technique to keep the opamps from swinging to maximum output with no current flowing, due to opamp input offsets.  But thanks for the heads-up that must be super duper frustrating!

[Davidwasalreadytaken]

Very late-hit followup post to give some of you a good laugh.  I built it, and have been using this for the last many years to test various power supplies that come through my shop.  It works, and it works well.  Usually.  Except for today, when the mains cables for the volt meter came loose and gave wacky readings.  Since the side panels were off for repairs, I figured I may as well show my work.

Yes, this was built in the case of an ancient Tektronix oscilloscope.  The pop-up/off side panels are extremely handy.  The front and rear are old ventilated covers from some Hewlett Packard and ... whoknowswhat branded equipment that were retired.  The sensing element came from a high power something or other, possibly an uninterruptible power supply? I forget, but it's basically a giant angle of metal.  Internal wiring is ... not as tidy as humanly possible.

Surprisingly, it all works well enough with everything on protoboard!  The only thing that isn't on a board is the instrumentation amplifier, which is dead-bug on a socket with long legs, and I think a couple spots of hot glue.  Before the wiring was installed, I was proud of my tidy and symmetrical PCB work.  At least the wires are all in screw-tightened connectors, which made for very easy installation!

I added a switch to cut the drive to the transistors, marked Enable.  There is a coarse and a fine current adjustment, which are both very useful.  The current under load sometimes drifts for various reasons including but not limited to heating of wires attached to sources, so a little babysitting of the fine current knob is sometimes necessary.  The 4.5 digit meters are perhaps excessively precise but they're nice to have.  Calibration was a little tricky for the current meter, but it works great and matches indications on power supplies this is used with, so that's close enough for horse shoes.

The unlabeled front panel switch is for the fans, which have their own power source.  They are 2U server fans and sound rather loud when running.  I mostly only run them when I know I am going to be pumping over 400 or 500 watts into this, for extended periods - or over a kilowatt for any length of time.

The input cables are extremely flexible, I think 8AWG very fine-stranded.  The cable assembly had sensing wires built in, and wire loom outside, when I got it.  The Heyco white cable clamps were in spares, which made me unreasonably happy.  I ran the sense wires to banana jacks just in case I wanted a sanity check on voltage.  All outputs are fused individually.  On one occasion I managed to blow all the fuses.  I was annoyed at how inaccessible some of them are, but VERY glad they were present!

There are a selection of random capacitors on the input, and a couple of very big clamp-on inductors.  These were experimentally selected, to (mostly) eliminate *audible ringing* of the circuitry (!).  Sometimes when current changes rapidly, the inductors will chirp or make grinding noises.

The "can't draw more than" label was experimentally derived with the help of a Xantrex supply that could easily give 130 Amps into a few millivolts!  I think the max. input numbers are based on a slightly conservative reading of the SOA graphs times eight, and I haven't tried those.  These are scary power levels for me, so I have only rarely used this unit to sink much over a kilowatt.

Total budget was observed, $0 as all of this came from scraps and spares on-hand.  Thanks again to all who offered advice!

[T3sl4co1l]

reference:

https://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/20100014777.pdf

This is a poor document, for a couple of reasons, but the primary one is the assumption of fixed Vg, which any reasonable analog engineer knows is not how you operate a transistor.  It's the correct assumption for beginning a model of spot runaway, but they stop short of actually considering what the lateral thermal conductivity of a die is; which depends on chip thickness, die attach thickness/quality, and baseplate thickness.  They note possible nonuniformities, but not what effects might compensate for them; and they miss out on the boundary conditions that are necessarily present in every device: there's power dissipation in the middle of the chip, and none somewhere near the edges; in the middle, there's plenty of chip, and at the edge, there's no more chip (no lateral conductivity)!  So their argument reduces to: why can't we use multiple whole devices in parallel, and that's something any engineer already knows, they don't thermally track.

The more impressive conclusion, then, may be the converse.  There necessarily exists a stable region where, even without thermally coupling together parallel transistors, they will indeed share power; as long as they have similar Vgs(th), yfs and RthJA overall of course.  And, given these parameters, one can calculate whether that's a meaningfully usable range; which I suppose even if it's a few watts, could be worth saving the opamp(s) in the rare case where matched transistors are available but common heatsinks (or just bigger heatsink for one, lmao) is possible.  Well okay, emphasis on "rare".

Tim

[Davidwasalreadytaken]

That's interesting, thanks for sharing.  It reads like a student's research paper looking at what to them is a new problem with fresh eyes.  I imagine what the literal rocket scientists miss, the papers from 1997+ in the automotive and other literature is likely to have covered, but for those of us not working on a thesis on topic, this paper hints at fascinating levels of geekery that have gone into the problem.

Revisiting my maths, it looks like I marked maximum current capacities on the low side, by a factor which probably made sense at the time, vs. the SOA limits shown at all voltages.  As the runaway failure mode mentioned in the linked paper creeps in from the high voltage side of things and I'm operating mostly WAY under 1/5 of the rated voltage here, and as I haven't killed it yet (LOL) I think I'm okay, but I'll have to bear the concept in mind going forward.

[nctnico]

The MOSFETs are quite large and would this need quite some capacitance at the OPs to slow them down.
So one may not really get full speed from the LT1007. Even larger MOSFETs would make things even worse.
I would no use so much voltage for the OPs - 10 V would be plenty and less risk to overly stress the gates.

Power ratings for MOSFETs tend to be specified too high to be real - to avoid to much effort with cooling, I would consider more like 100 W the maximum useful limit per TO247 case.

Even that is high. In quality commercial DC loads you typically see these are designed to dissipate 40W to 50W per transistor. My 1500W DC-load from TDI uses no less than 32 MOSFETs in a TO3 case which comes down to 47W per MOSFET. The Korad load I bought recently, sits at 38W per MOSFET.

[T3sl4co1l]

I built a load some years back, using 3 x FQA9N90C, which runs them -- I forget what the peak was, 100 or 200W max?  Overall operating range up to 4A, 100-500V.  (How is that possible? Tons of ballast resistors.  It's a switched-resistor bank first, a power DAC if you will, and the linear sink fills in the gaps.  Saves greatly on heatsink area.)  In that time, I've cooked them up to design ratings, and, yeah everything works just fine.  I have actually had two device failures, which I can potentially attribute to thermal cycling or poor mounting (one, the grease under it seemed to separate..?!), but have no reason to suspect the device SOA is false.

FQA9N90C are Fairchild QFET process (now obsolete), which I *think* is a conventional planar process; compare IRF740 (classic HEXFET), give or take subsequent optimizations.  Of course it's not a "HEX"FET, but that's probably what they mean by "stripe", it's rows of transistors instead of a hex mesh of them -- whatever.

There isn't really an equivalent to them today; the nearest-rated cheap part current stocked at DK is Toshiba TK10J80E,S1E, which despite being the superior Superjunction process (they don't say so, or, you'd have to look up what "π-MOSVIII" means, but it's evident from the step change* in Coss and Crss), is only about a factor of 2 improvement in Qg*Rds(on).  It doesn't have full SOA, but does have 2nd breakdown starting at a modest 200V, and usable power (40W or so?) up to 400V, so that's not awful.

There are SJ MOSFETs with full DC SOA out there; they're just lower power, or higher cost.  Or the few surviving planar families -- IXYS is still making a few PolarHV types, which I think are planar.  But IXYS is expensive, and you might as well use their linear-rated families if you're going to pay most of the price anyway.

*They actually show it as a step change! Most mfgs measure this parameter at a rapid Vds sweep rate where the step change is blurred out -- there's an RC time constant effect internal to the structure -- and yes that contributes switching losses -- with the result that you get a smoother curve but it's unrealistic, you'll never measure the same thing in the circuit.  They also show the rising edge, which overestimates capacitance oddly enough, but critically it's not the same measurement rising vs. falling, which is to say there's a hysteresis loop in the capacitance measurement -- which is to say further: a loss element.  But here, Toshiba measured it slowly enough that the step change is evident.  It really does "switch" capacitance; it's actually even scarier than that (capacitance is undefined, or a multivalued function of Vds (including very large positive and negative values) in the transition region), but, nevermind that.

And yes I'm proud of that "discovery" and want to make it known as widely as possible.  It took me ages to finally find all the information to put that together, including my own measurements.  The manufacturers sure as hell don't tell you about it!

Tim

[coppercone2]

really trying to push mosfets down everyones throat with deceptive advertising!

apparently RF filter manufacturers play the same sweep/smoothing game with performance too.

Kinda funny how the manufacture of these MOSFETS is one of the most expensive common processes (compared to say making bolts) but their use is so poorly documented. you would think it would be the most documented and tested thing available on earth given the resources put into making them.

it reminds me of the old accounting trick where you 'spread' the documentation of purchases through the quarters so there is no spike! (why I don't know but I know its done)

it ends up being kind of like averaging the height of a telephone pole into the slope of a hill (based on the surface area of the telephone pole top) in the path of an air plane.

for some reason it makes me think of like seedy corporate behavior involving large projects in general. like failing campus, specialty district, etc. seems that there is an assortment of standard 'deceptive' practices you need to 'install' in your business to 'mitigate' problems

[Davidwasalreadytaken]

Perhaps that is a little too unkind to the engineers (sales weasels are a different question).  Hanlon's razor always applies, and I think engineers can be excused for not rigorously testing their switching FETs for edge-case failure modes when they are used in ways never intended.  Perhaps the reply to "why didn't you test for this failure mode and characterize your device properly" would sound something like "why didn't you use the right part in your application?"

[coppercone2]

you can bet the data sheet was HIGHLY redacted by sales

if an engineers were behind it, it would be a text book of different graphs. whats easier figuring out whats 'good' data or just posting all your recordings ? at work typically you make recordings all damn day. what did you do today? *hands boss a wad of recordings*

its great, shows how much work you did too. all those graphs and tables. you put hard work into making all those measurements
and you get credit for the 0.1% that make it into the sales brochure/project cover sheet.

the data does exist because the figure heads need to be confident in being able to vouch. people throw em curve balls. there has got to be tomes of it

you think no one thought for all these years to be able to sell a part for MORE then just switching? more APPLICATIONS = MORE SALES.

you know that the real reason was "well we don't want to confuse the customer!"

[p.larner]

looks like running fets in linear mode is just a bad idea,i think bjt's would be better but current driven so more complex drive methods needed.

[Davidwasalreadytaken]

Thanks for commenting.  I made one with BJT power devices as well, haha!  I like this FET one better for its higher voltage and power capacities.

I did this: https://forum.allaboutcircuits.com/threads/a-high-power-active-load-for-dc-power-supply-testing.168850/

[Davidwasalreadytaken]

Everyone be amused/facepalm/take caution from my example!

I had to switch out all the FETs today, because I blew them all up.  I kept not blowing up this load at increasing power levels, and did not take a hint from blown fuses at 35V 60A input.  Twice. 

Soooooo I was happy to have a handful of APT 30M85BNFR, which is a 300V 40A 0.085 omhs RDSon TO-247, in place of the 47N60C3, which are 650V 47A 0.07 ohms device.  It's got a lower current rating at DC at high voltage, and it always made me cringe to draw much over 1kV, so I'm gonna derate my load and tell myself not to draw more than about 1200 Watts.  Anyway, 5 hours later, it's up and running again 

update: it blew up again.    time to get some higher power FETs so I can blow it up again i guess 

[PCB.Wiz]

Everyone be amused/facepalm/take caution from my example!

I had to switch out all the FETs today, because I blew them all up.  I kept not blowing up this load at increasing power levels, and did not take a hint from blown fuses at 35V 60A input.  Twice. 

Soooooo I was happy to have a handful of APT 30M85BNFR, which is a 300V 40A 0.085 omhs RDSon TO-247, in place of the 47N60C3, which are 650V 47A 0.07 ohms device.  It's got a lower current rating at DC at high voltage, and it always made me cringe to draw much over 1kV, so I'm gonna derate my load and tell myself not to draw more than about 1200 Watts.  Anyway, 5 hours later, it's up and running again 

update: it blew up again.    time to get some higher power FETs so I can blow it up again i guess 

There is no over voltage/spike measures in #1 ?  Also adding gate-source clamp zeners would help protect against long wire effects.
You need to decide if it is going unstable, or a SOAR failure.

It is common to add a cap from the opamp output to -ve in, when driving high C loads which helps control overshoot.

If all fets fail together, that suggests an over voltage effect.

[Davidwasalreadytaken]

It would not surprise me a bit if the device was unstable, but I was pushing over 150W each DC through these replacements at relatively low voltage, without so much as a finger-thermometer to keep an eye on temperature.  VERY careless of me, I know.  They also did not fail simultaneously, but the last ones failed as I was increasing current again to see what would happen  (spoilers, they popped).  Apparently they were not sharing current at all evenly

Thanks for your ideas, I will research them for v1.2 when this load gets rebuilt.