PCIe ground pin count

[argh6543]

I'm starting a new project where I want to re-use the physical 16x PCIe connector. Since I will also have a lot of differential signals, I looked over the PCIe usage of the pins, and now I'm wondering about the number of ground pins the standard uses. In the higher numbered pins, it is very consistent with ground always opposing signals. For example, A66 and A67 are transmit lane 12 so the opposing B66 and B67 are ground. Then A68 and A69 are ground and B68 and B69 are the receiving lane 12. Transmit lane 13 then takes A70 and A71  with ground on B70 and B71 and so on. On the lower end, the pattern isn't always followed. Transmit Pair 0 takes A14 and A15, but B14 is part of the reference clock pair.

Why are the signal pins opposed by ground? I get having a ground pin between the differential pairs on the same side, but wouldn't the inner ground layer of the PCB provide enough isolation between the A and B sides?

[T3sl4co1l]

You want grounds around, somewhere or another.  You wouldn't put ground between the pairs, that reduces coupling.  Grounds beneath or beside the pairs, is good however.  The alternating configuration seems ideal as it accomplishes both at once.  The lower pairs/lines may've been an oversight in earlier standards, or a compromise given limitations on pin count vs. required functions.

Also keep in mind, power supplies count as RF ground too!

Tim

[langwadt]

You want grounds around, somewhere or another.  You wouldn't put ground between the pairs, that reduces coupling.  Grounds beneath or beside the pairs, is good however.  The alternating configuration seems ideal as it accomplishes both at once.  The lower pairs/lines may've been an oversight in earlier standards, or a compromise given limitations on pin count vs. required functions.

Also keep in mind, power supplies count as RF ground too!

Tim

an some extend also signal pins at a steady state with reasonably low impedance

[argh6543]

You wouldn't put ground between the pairs, that reduces coupling.

Yeah, I did a ground pin between a differential pair in college once - every other pin was simply ground. I think that was the lowest scoring (and functioning) project I ever did.

I am wondering specifically about the ground on opposing pins of the connector. The PCIe standard seems to be built around the idea of 4 or greater layer PCB. Instead of having the pins alternating ground, couldn't you simply have one of the inner layers be that ground to avoid interference from the A to the B side? That way you can have signal pins on both sides like A66 + A67 be one pair (A65 and A68 being ground to to protect the pair from the next one) and B66 + B67 being another pair. That saves roughly 1/3rd of the pins, while still maintaining ground between differential pairs on the same or the opposing layers?

[T3sl4co1l]

Oh that'll be no problem: you stick a via in or near each edge connector finger, and that's as good as grounding can get, period.

There are connectors with planes/shielding around and between the pin rows, but there's not really any way to tie that in with a planar build where the plane must be buried by outer layers -- you can't extend fingers directly from the inner layers, the whole PCB stackup has to cover everything.  Unless you're going to pay for a *very* custom build with milled-out and plated pockets -- it can be done, but do you really need it that bad..?   (Even then, connectors are probably hard to find that require such measures?)

Tim

[Doctorandus_P]

The lower pairs/lines may've been an oversight in earlier standards, or a compromise given limitations on pin count vs. required functions.

Not an oversight, hardly a limitation.
I never had a look at the pinout of PCI-e before, Wikipedia is pretty clear:
https://en.wikipedia.org/wiki/PCI_Express

Each differential pair has GND pins on the left and right.  Side A vs. Side B hardly matters, because PCI-e cards will almost certainly have GND planes on their internal layers. I guess it's more like, Why won't they offset the A and B side? There is no reason to not offset the pairs between the A and B sides.

There are also riser cards and flexible cables in existence for PCI-e, maybe offsetting A and B sides helps a bit there, but I do not know how such cables are built internally.

[argh6543]

Each differential pair has GND pins on the left and right.  Side A vs. Side B hardly matters, because PCI-e cards will almost certainly have GND planes on their internal layers. I guess it's more like, Why won't they offset the A and B side? There is no reason to not offset the pairs between the A and B sides.

I went down that road for a while too, but then the question is, why two ground pins between differential pairs instead of one?