Analog switch multiplexing

[pyrohaz]

Hi all,

I'm wanting to find the easiest way to read a couple of switches in the least amount of pins so I've decided to have a go at reading the switches through one analog pin. I am pretty much sure that I'll only need to read one switch at a time so reading multiple switches shouldn't be an issue.

I'm using a switchable potential divider to switch in different resistors to ground, therefore varying the output voltage. The problem I have however is that I'm getting a fair bit of error in the reading side of things.

I'm currently reading the input 16 samples at a time and ensuring that the maximum error between samples is no more than 10 ADC counts, I'm assuming that the voltage is pretty stable. The problem is when the voltage changes between button presses, obviously the voltage runs past other defined voltage levels and I think this is causing my problem.

Does anyone have any suggestions on how I can read these switches effectively? Obviously, I can increase the amount of samples I read but that makes the switch reading process sloooooow! I've thought of essentially differentiating the ADC reads and looking for the peak voltage change to determine which switch was pressed but that seems a total chore.

[T3sl4co1l]

Why does the sampled value change so slowly?

I'd suggest an R-2R ladder: this is how DACs are made (well, some of them), and gives the largest and most consistent step size for a given number of switches.

Note that the highest magnitude resistors must be the most precise, and that precision must be better than the minimum step size.

Tim

[Alex Eisenhut]

Why does the sampled value change so slowly?

I'd suggest an R-2R ladder: this is how DACs are made (well, some of them), and gives the largest and most consistent step size for a given number of switches.

Note that the highest magnitude resistors must be the most precise, and that precision must be better than the minimum step size.

Tim

Probably because the AD input of (the ones I've seen) microcontrollers aren't meant to be driven by a high-ish source impedance like this, and the source impedance naturally changes depending on which switch is pressed, so the value will take the longest to settle for the largest resistor values.

It's been a while, and I don't know which uC the OP is using, but some PICs have an analog comparator module, I wonder what can be done with that.

[pyrohaz]

Why does the sampled value change so slowly?

I'd suggest an R-2R ladder: this is how DACs are made (well, some of them), and gives the largest and most consistent step size for a given number of switches.

Note that the highest magnitude resistors must be the most precise, and that precision must be better than the minimum step size.

Tim

It doesn't change particularly slowly, I'm more so ensuring I don't get a sample that is on a rising or falling edge. A R2R format would probably have been much better! Even with an R2R setup though, is there any chance of misreads?

Why does the sampled value change so slowly?

I'd suggest an R-2R ladder: this is how DACs are made (well, some of them), and gives the largest and most consistent step size for a given number of switches.

Note that the highest magnitude resistors must be the most precise, and that precision must be better than the minimum step size.

Tim

Probably because the AD input of (the ones I've seen) microcontrollers aren't meant to be driven by a high-ish source impedance like this, and the source impedance naturally changes depending on which switch is pressed, so the value will take the longest to settle for the largest resistor values.

It's been a while, and I don't know which uC the OP is using, but some PICs have an analog comparator module, I wonder what can be done with that.

I'm using the STM32F4 with the slowest ADC sampling time

[Alex Eisenhut]

I'm using the STM32F4 with the slowest ADC sampling time

I see, there's usually a suggested input circuit and an equivalent input circuit for the AD somewhere in the datasheet. And from what I see, you're going to have funny RC and voltage divider effects to take into account...

There's some pretty high resistances in there in table 75.

[max_torque]

What you're going to have to do in software is both "gate" the adc result into descretised bins and then only declare a valid switch input when you have enough samples that fit in the gates.


ie. no button is say max adc (4096) value

button 1 is say 1000 counts, button 2 2000 counts etc etc

So, sample the adc at say 50 hz, and when you get a result see if it falls into one of the gated bins.  ie if the result is between say 950counts and 1050 counts, consider the value to be 1.

Then do the same on the next sampling event.  If it isn't 1 again (ie adc has move outside the 950 to 1050 range) then reset a counter to zero, if it is 1, increment a counter.   When the counter reaches a suitable value, (say 5, which means button has been pressed for 5 x 20ms = 100ms) consider than a valid switch 1 input etc

[Alex Eisenhut]

What you're going to have to do in software is both "gate" the adc result into descretised bins and then only declare a valid switch input when you have enough samples that fit in the gates.


ie. no button is say max adc (4096) value

button 1 is say 1000 counts, button 2 2000 counts etc etc

So, sample the adc at say 50 hz, and when you get a result see if it falls into one of the gated bins.  ie if the result is between say 950counts and 1050 counts, consider the value to be 1.

Then do the same on the next sampling event.  If it isn't 1 again (ie adc has move outside the 950 to 1050 range) then reset a counter to zero, if it is 1, increment a counter.   When the counter reaches a suitable value, (say 5, which means button has been pressed for 5 x 20ms = 100ms) consider than a valid switch 1 input etc

Pretty much, and you need to use their formula to figure out the actual value the ADC will return given the resistances involved.