Opamps - Die pictures

[Noopy]

Thanks for your explanation! That was my what I had in mind.

[magic]

Texas Instruments OP07

Obsolete and no longer available from Texas Instruments.

SNOA471B, page 38

A fairly inexpensive basic grade OP07 is available from Texas Instruments. The chip appears to follow the PMI original in circuit topology and layout quite exactly. A notable difference is proportionally more area eaten up by capacitors; I'm not sure what's going on here. Die size is about 2.25×1.7mm.

From left to right, we see:
- input stage collector load resistors, connected to VCC+ through an additional network of resistors with zener zaps
- the input stage differential pair in standard common centroid layout, bias cancellation injection mirrors north-east and south
- the input stage two level cascode, with the same twisted connection pattern as seen in PMI
- NPN emitter followers driving the second stage
- second stage PNP differential pair, combined with NPN active loads for the drivers (PNP base = NPN collector)
- a long main bias startup resistor and some more resistors
- second stage current mirror
- PNP current mirror biasing the 2nd and 3rd stage
- the third stage
- the output stage


This is corrected and cleaned up for readability schematic from old TI datasheets, believed to be complete and accurate at the time of posting
Current datasheet contains μA741 schematic, don't ask


The weird flat depressions which are not-quite-exactly-aligned with active areas of transistors are the buried layer pattern appearing on the surface of the epitaxial layer. During epitaxial growth, this pattern of depressions shifts sideways (here: north) by approximately the thickness of the epitaxial layer (here: some 17μ). The actual diffusion is still not shifted and remains under the active areas. PMI, Analog and Linear developed processes where this shift doesn't occur and edges of the pattern don't cross active areas of transistors.

Buried layer is absent under the output PNP emitter follower (second structure north of VCC- pad). This is because it's a substrate PNP and buried layer would increase recombination of injected holes headed towards the substrate collector and thus decrease β. Instead, low resistance base connection is provided in the form of N+ diffusion on the surface. Buried layer is also absent under capacitors, except for one, perhaps for the junction capacitance which it represents between VCC+ and VCC-, but I don't really know.


A higher resolution version of the image is attached below, scaled to approximately 1μ per pixel. This image was also a test whether a 5x microscope objective has enough resolution to capture important details of "easy" bipolar ICs that don't have very dense structures. Some contact windows aren't fully resolved from metal edges, not a major problem. More importantly, emitters, PNP collectors and such are mostly visible when they extend beyond the metal contacting them, which saves a lot of guesswork. So the answer is "it can work", but this chip is quite nondemanding on the optics...

The die is in slightly less than perfect condition because it served as a test subject for quite some time, but I don't feel like decapping another one.

[Noopy]

A notable difference is proportionally more area eaten up by capacitors; I'm not sure what's going on here.

Perhaps a more modern process with higher gain-bandwidth-product and because of this you need more compensation?

Current datasheet contains μA741 schematic, don't ask

This image was also a test whether a 5x microscope objective has enough resolution to capture important details of "easy" bipolar ICs that don't have very dense structures.

[AnalogTodd]

The weird flat depressions which are not-quite-exactly-aligned with active areas of transistors are the buried layer pattern appearing on the surface of the epitaxial layer. During epitaxial growth, this pattern of depressions shifts sideways (here: north) by approximately the thickness of the epitaxial layer (here: some 17μ). The actual diffusion is still not shifted and remains under the active areas. PMI, Analog and Linear developed processes where this shift doesn't occur and edges of the pattern don't cross active areas of transistors.

The buried layer shift comes based on the crystal structure used in the wafer and subsequently causes the shadow of its location to shift as the epitaxial layer is grown. Depending on whether or not you are using a 100, 110, or 111 wafer will determine if you get a shift or not. One interesting bit is that the wafer supplier has to saw the flat edge of a wafer in a specific location based on the structure used or you won't know what direction the shift will occur in when you grow the epi. This is a problem because you are aligning to what you see for the buried layer after the epi is grown, and if it is in a different location than expected, your isolation can cross over the buried layer and won't actually isolate anything. I have seen this occur once before where a run of wafers came out of fab and the flat was sawn on the wrong side of the wafer and all the tubs were shorted to each other.

A notable difference is proportionally more area eaten up by capacitors; I'm not sure what's going on here.

Perhaps a more modern process with higher gain-bandwidth-product and because of this you need more compensation?

More than likely a different process overall where the amount of capacitance per unit area is a lot lower. Depending on the process, one manufacturer may be able to get away with capacitors formed by reverse-biased junctions, whereas these capacitors are metal-oxide-silicon (MOS) devices. Even if both used the same MOS capacitor, the thickness of the oxide layer is a main factor in capacitance per unit area (maybe one process has an option for stripping the oxide in the capacitor region and regrowing a thinner oxide, I've used that before in bipolar processes and it's common with gate oxides in CMOS devices). The capacitance needed is going to be based more on the circuit biasing than the transistor bandwidth, and a big bipolar process like this is going to be notoriously slow, especially with lateral PNP devices.

[magic]

Depending on whether or not you are using a 100, 110, or 111 wafer will determine if you get a shift or not.

So what would be the advantage of such wafers? They seem to be widely used on jellybean bipolar ICs, despite making mask alignment harder for the fab.

OTOH, the likes of PMI/AD/LT clearly avoided them, I noticed it a while ago.

[magic]

National Semiconductor LM4562

No details of the internal circuitry have been released so far, and quite probably never will be.

Douglas Self

LM4562 is a high performance bipolar opamp designed by National Semiconductor primarily for audio applications, featuring quite high speed, low distortion, better than average load driving ability, low broadband voltage noise, but somewhat more current noise than the popular NE5532. It looked like a serious effort at attacking the established position of NE5532, with better performance in almost every regard, probably the most audio specs in any datasheet at the time, and some marketing effort. National released it in metal cans to cater to audiophiles, and Bob Pease himself swore that it sounds good. While not as cheap as jellybean opamps, not horrendously expensive either, unlike some other "better than 5532" options out there.

Widely believed (but I haven't verified) to be the same part as LME49720, which started a whole series of LME opamps, power amplifier drivers and similar audio ICs, before TI took over and discontinued most of them. LM4562 was also meant to get axed, but there was apparently a sizable and vocal enough user base for the bean counters to reconsider.

The inside reveals a modern complementary bipolar process with no lateral PNPs in sight and higher density compared to jellybean chips. This die is actually smaller than OP07 at roughly 1.8×1.5mm, but it packs two channels and probably more transistors than OP07 in each of them. There is one layer of metal interconnect and a layer of what I suppose is polysilicon, used for resistors, lower plates of capacitors and to cross traces. Immediately visible are substantial output stages in diamond buffer topology and several caps. The input stages use common centroid layout, with no additional means of offset voltage control like fuses or laser trimming, typical for an audio-oriented chip. Worst case offset is 0.7mV.

Long resistors at the bottom power the main bias generators, as per US3930172.



A closer look at individual transistors reveals two types: with and without frames By tracing connections with supply rails it becomes evident that the "framed" transistors are PNP and the "unframed" are NPN - same as in TP1322 / HA-2520. In each case the active area is the emitter strip in the center and the base is connected from both sides. Isolation between transistors is not visible. The transistors below are the input stage, by the way, and we can answer Douglas Self's doubts: yes, there is bias cancellation, the small NPNs at the bottom are a current mirror sinking from the input pins. The differential pair is PNP with no emitter degenation and no cascoding, collectors go to a current mirror at the negative rail. This looks like a two stage topology.




Higher resolution image at 400nm/px below.

[AnalogTodd]

Depending on whether or not you are using a 100, 110, or 111 wafer will determine if you get a shift or not.

So what would be the advantage of such wafers? They seem to be widely used on jellybean bipolar ICs, despite making mask alignment harder for the fab.

OTOH, the likes of PMI/AD/LT clearly avoided them, I noticed it a while ago.

Oh man, it's been 30+ years since I did my materials science class going over this...I'll try to remember what I can. I'm not a process engineer, but instead an IC design engineer so my understanding isn't as deep as some. I know about LTC moving away from the wafers with the buried layer shift, I was a designer there from the mid-90's until a few years after the acquisition by ADI.

Mask alignment really isn't harder for the fab, they are aligning to the visible buried layer whether there is a shift or not. Where it gives concerns is the visible buried layer, while not physically located where seen, has damage in the lattice that you don't want going through sensitive circuitry, so you'll see things like bandgap transistors oriented to avoid that from going through the critical junctions (NPN emitters are a big one).

The different wafer types define how the face of the wafer is cut relative to the crystal structure. The diamond structure of silicon means you can cut in one of three ways:
Each of these gives different characteristics in different places. Etching definitely changes as a function of crystal structure. Oxide growth and reliability is affected by this, as is the number of dangling bonds that occur at the surface (since the surface atoms will be missing connections that would normally exist). One concern with dangling bonds is hydrogen getting in, it readily gets through silicon dioxide (but not through plasma enhanced nitride) and the hydrogen readily latches onto those dangling bonds. This causes issues with changes in the charge right at the surface of the silicon and causes huge shifts in device parameters.

Honestly, I think a lot of the reason for using different wafer crystal structures over the years has been a matter of overall manufacturability and reliability that was attainable at the time. As technology and understanding has moved forward, there has been a move to the different crystal orientations for newer processes. Of course, the older products are not going to be redesigned into the new processes because the time required to do so is expensive compared to just continuing to manufacture on the existing process. Almost all of the older processes can still be manufactured on newer tools, so fabs don't need to keep decades old equipment up and running. Personally, I feel that there is a loss in the industry right now of knowledge of these older processes and the pros and cons of them as new people coming into the business haven't learned about things like these and can't debug problems in these chips. Heck, I've interviewed some new grads that have no clue about how to use bipolar devices because schools are shifting away from teaching it.

[Noopy]

Here you can see a relatively new µA709 from Fairchild. Fairchild sold the µA709 for the first time in 1965.






The dimensions of the die are 1,1mm x 1,0mm. In any case, this is not the first revision of the design. On various websites there are pictures of the first µA709, which have a slightly different design. There are seven mask revisions on the die. 7709N could be an internal designation.


https://www.richis-lab.de/Opamp78.htm

 

[RoGeorge]

I wonder why they didn't rotate the die a little counterclockwise, so to minimize the length of the bonding wires?

[iMo]

Long time back (say till 90ties) the bonding was done manually (a large room full of young ladies staring into their microscopes, they worked in 1-2hours shifts not to lose their eyesight..).
Thus they did regardless how the die happened to be positioned.

PS: also they soldered or glued the die into the package manually as well..

[Gyro]

The bond wires all look to be roughly equal and generous lengths. Maybe they had difficulties with short wires, excessive flexing of the first bond while running out to the second one? Keeping them relatively horizontal rather than significantly domed might have been a limitation of the early ultrasonic bonding heads. Maybe less vertical travel or visual depth of field? I bet there was probably some subtle reason why longer bond wires were 'easier'.

[exe]

Widely believed (but I haven't verified) to be the same part as LME49720, which started a whole series of LME opamps, power amplifier drivers and similar audio ICs, before TI took over and discontinued most of them. LM4562 was also meant to get axed, but there was apparently a sizable and vocal enough user base for the bean counters to reconsider.

LME49720 is my current favourite bipolar opamp. It is fast, wide phase margin, and, what surprised me, has very low (for an opamp) open loop output impedance of 13 Ohm. That's by far lower than most of other opamps in its category. Looking at LM4562 datasheet, it also specifies the same output impedance. I don't think it's a coincidence.

[magic]

Emitter followers work like that; none of that rail to rail rubbish
Did you try NE5534/2? I think it could be fairly low as well, though maybe not 13Ω but closer to 15~20Ω.

[exe]

Emitter followers work like that; none of that rail to rail rubbish
Did you try NE5534/2? I think it could be fairly low as well, though maybe not 13Ω but closer to 15~20Ω.

Hmm, interesting, I googled it and I found that indeed most NE5532 have output impedance of around 20-30 Ohms ([1], though there is one outlier from HGSEMI with impedance of 149  ). That surprises me, as I thought there should be emitter resistors to protect output stage.
I think my confusion comes from the plot in AoE 3 (page 311) (attached). Most opamps don't come even close to the LME49710. However, most opamps there are not audio opamps. I think some audio opamps are designed to have lower output impedance so that they can drive heavier loads with less distortion.

Well, I'm even more proud of NE5532, though still like my LME49720 due to lower input bias).

[1] https://s-audio.systems/blog/5534-measurement/?lang=en

[magic]

TI and Raytheon specify 14~15Ω per resistor and they are effectively in parallel, but also in series with output resistance of emitter followers at maybe ~2mA bias.
LM4562 is a bit of power hog, it helps if significant current flows in the output stage.

outlier from HGSEMI with impedance of 149

Chinese manufacturer, datasheet stolen from TI with replaced logo and some pages missing. I'm sure it's legit

And what's that, 30° phase margin in their internally compensated dual?

[magic]

Japan Radio Company NJM2068

The NJM2068 is a high performance, low noise dual operational amplifier. This amplifier features popular pin-out, superior noise performance, and superior total harmonic distortion.

An older Japanese Hi-Fi opamp, not as good as NE5532 but performs relatively well at low gain with light loading. In recent years the chip has gained some Internet fame thanks to its use in headphone amplifiers like Objective2 and JDS Atom. Typically for Japanese opamps, exact input noise density specifications appear to be a secret of the manufacturer, but I can reveal that broadband noise voltage is ~3.5nV/rtHz.

The datasheet schematic shows 4558 topology. Compensation is somewhat more complex than usual and the chip exhibits typical for audio opamps high open loop gain at low frequencies, followed by fast falloff below 1MHz and unity gain crossover at a few MHz. Old age and differential input voltage rating of ±30V suggest lateral PNP input stage, making NJM2068 possibly the highest performance opamp with such inputs ever made.



The inside looks typical for a 4558 style amplifier. Output transistors of each channel are laid out in line with the corresponding input stage like in precision opamps, but input stage common centroid layout is not used.



Input transistors are made of eight paralleled lateral PNPs each. The darker rounded rectangles with holes are collectors and the small circles are emitters, both embedded in a larger N-doped region which is the base. Active base region where transistor action happens is the gaps between emitters and collectors. Base potential is distributed around the area by a surface N+ diffusion and additional metal strips on the sides of the collectors. Buried N+ diffusion is also employed below the PNP structure (and elsewhere), but poorly visible on this image. Buried layer pattern shift is present in this process.

An unusual feature, indicated with arrows below, are thin "frames" surrounding all contact windows and typically, but not always, extending in the direction where the metal trace is coming from. I have absolutely no idea what they are.

I expected to maybe see evidence of additional doping applied to PNP emitters. There clearly is "something" there, as pointed by one of the arrows, but it could be the same contact window thing as elsewhere. No idea what's going on



Attached below full chip at 400nm/px. This and LM4562 were both shot with a 10x0.25 microscope objective, which appears to be about good enough for 40V bipolar technology.

[AnalogTodd]

An unusual feature, indicated with arrows below, are thin "frames" surrounding all contact windows and typically, but not always, extending in the direction where the metal trace is coming from. I have absolutely no idea what they are.

I expected to maybe see evidence of additional doping applied to PNP emitters. There clearly is "something" there, as pointed by one of the arrows, but it could be the same contact window thing as elsewhere. No idea what's going on

What it might be is a mask that is used to create capacitors. The capacitor across the resistor at the bottom of the input stage is N+ to substrate, no surprise as it will likely on see a tiny voltage. However, the cap that goes from the output of that differential pair to the PNP driving the output can see enough voltage to break down a junction capacitor and must be created using an oxide. That oxide must be thick enough to handle a fairly high voltage and may be done by stripping the oxide in the capacitor area and growing a clean and better controlled thickness oxide in the region. Doing this allows for much cheaper steps earlier in the process at the expense of an added mask and step for the capacitor. The issue would be that when contact etching is done you could over-etch enough that you might compromise the capacitor, so to make it simple you just do a logical OR of all contacts and the capacitor to make sure oxides are all the same thickness and the concerns of over-etch go away.

As for the additional doping to the PNP's, that's really not a good idea on an older bipolar process like this. Misalignment of masks could give you one direction where the breakdown is lower than the other as distances between collector and emitter change. You really want those to be the same masking and diffusion so they self-align. You can see evidence of mask misalignment when you look at the NPN emitters in your zoomed in picture--the metal on the left side looks coincident with the contact edge, ideally there would be better coverage (look at top and bottom edges of those emitters).

What I am finding interesting is the use of overlaying the base on the isolation around the die. You can see it done to create the FET just below the V+ pad with the narrow channel through the iso, and in places where contact to the substrate is needed (around the vertical PNP output device is good spot as is the stripe above the V- pad). Down around the input amplifiers it gets used quite a bit but is never contacted. I don't think it is for field relief to help control breakdown voltages, it might just be to get a lower overall resistance to the substrate in case devices saturate, it's hard to tell.

One last interesting item to note is the resistor in series with the emitter of the NPN hanging on the differential amplifier output. It's a small resistor (just above the emitter resistors from the differential pair NPNs) and it has a chunk of N+ over the top of it. This is a pinch resistor where the N+ changes the dopant concentration to make a base diffusion resistor value much higher, (10-100X higher) and the value of the resistor will go up and down proportionally as the NPN beta in the process varies. Seems like it would up the gain of the amplifier quite a bit as process varied, but I don't know well enough to make that call.

[Noopy]

The Fairchild µA776 is an opamp with a very special feature. You can set the bias current of the circuit externally. The supply voltage can be chosen between +/-1,2V and +/-18V. Depending on the bias current at +/-15V the µA776 typically consumes 20µA to 160µA. A high bias current increases the slewrate from 0,1V/µs to 0,8V/µs but also the input bias current from 2nA to 15nA. The datasheet states an overshoot of 10% with the high bias current that doesn´t occur with the low bias current setting. The variant with the index C is specified for an temperature range between 0°C and 70°C. With an index M the temperature range is -55°C to 125°C.




The schematic in the datasheet shows a common circuit. The bias currents of the different amplifier sections are generated with some current mirrors (blue). The reference current for the bias circuit is the current flowing out of the Iset pin.




The pin carrying the negative supply is connected directly to the package.






The size of the die is 1,6mm x 1,4mm. The circuit looks like the schematic in the datasheet. In the middle of the die you can see the symmetrical input amplifier section.


https://www.richis-lab.de/Opamp79.htm

 

[magic]

The circuit looks like the schematic in the datasheet. In the middle of the die you can see the symmetrical input amplifier section.

Almost like the schematic
Note emitter degeneration in the input stage.
Or Q10 overcurrent protection which blows up Q9 when activated (in reality it looks like μA741 protection)

So far I'm not sure if we have ever seen one accurate schematic of any linear IC from Fairchild...

edit: 702 and 709 were OK

[Noopy]

Let's say it's more correct than most of the μA741 schematics we have seen so far. 

[Noopy]

The Teledyne Philbrick TP1321 is an opamp with a high bandwidth and a high input resistance. The amplification factor must not be less than 3. The bandwidth is then at least 33MHz. The input current at room temperature is specified with a maximum of 25nA, the input resistance with 300MΩ.

Like the TP1322 (https://www.richis-lab.de/Opamp49.htm), the TP1321 belongs to the "optimized 741's" series. Both opamps share the same datasheet. The TP1322 has a higher slew rate, while the TP1321 is specified with a higher bandwidth. The TP1321 is therefore suitable for lower output levels. The Teledyne Philbrick catalog from 1972 states a price of 15$. Today (2023) this corresponds to a value of 112$.






Although there are only three years between the production of the TP1321 and the TP1322, the assembly technology is clearly different.




The wafer was obviously cut a little and then broken at these cut edges.








The dimensions of the die are 1,8mm x 1,3mm. Although the characteristics of the TP1321 and TP1322 are very similar, they are obviously two very different designs. However, the same process from Harris Semiconductor was apparently used, which produces very thin frame structures around the transistors and is described in more detail with the TP1322. For the TP1322 an identical Harris opamp can be found. Harris also specifies alternatives for the TP1321, but these have a different layout.

A relatively large capacitor is integrated at the top left, but it lacks the metal layer that would represent the second electrode. It is quite possible that this design with slightly more compensation was sold with a lower bandwidth.


https://www.richis-lab.de/Opamp80.htm

 

[magic]

The closest Harris part appears to be HA-2622.
The weird circuitry around the input stage seems to match, whatever it is. An attempt at bias cancellation by combining PNP and NPN?

edit
Of course. Q30 and Q31 base currents are equal, so Q29 should approximately cancel Q28.

I tried replacing the schematic with a higher quality version from 1996, but it had errors so back to 1975 we go

[Noopy]

The closest Harris part appears to be HA-2622.

But just the circuit is similar, the design is a different one (or older or newer).

The weird circuitry around the input stage seems to match, whatever it is. An attempt at bias cancellation by combining PNP and NPN?

edit
Of course. Q30 and Q31 base currents are equal, so Q29 should approximately cancel Q28.

Yes, that´s really interesting! 

[Noopy]

With the CA3020, RCA sold a small power opamp, which was available in two versions. The index A marks the better version, whose output stage can be supplied with up to 12V instead of 9V and can conduct at least 180mA continuously instead of 140mA. This increases the output power from up to 0,5W to a maximum of 1W (10% THD). The bandwidth is typically 8MHz. The permissible operating temperature range is specified as -55°C to 125°C.




It seems like the A variant has not been sold initially. In this ad in the magazine Electronics from May 1967, there is at least no reference to the A variant.




A year later, RCA was already advertising the A version.




Today you can often find the Intersil datasheet for the CA3020. Minor errors have crept in there. Two connections have been omitted and resistor R7 is labelled R5. In the datasheet revision from the year 2000, after 33 years of production, the CA3020 is marked as obsolete.

The transistors Q2 and Q3 form a differential amplifier. Transistor Q1 can be used as an upstream buffer stage. The diode chain D1, D2, D3 is used to set the operating point. The voltage from two pn junctions is fed to the inputs of the differential amplifier via R4/R6. The further resistors divide the voltage of the two diodes by slightly more than half. Overall, this generates a certain bias current that is relatively temperature-stable. The potential of the three p-n junctions is applied to the collector resistors R1/R3. While pin 9 is used to supply the circuit, the series resistance of the differential amplifier can be set via pins 8 and 11. A higher resistance reduces the current consumption, but also the output power.

Transistors Q4 and Q5 are driver transistors, from which feedback is fed to the differential amplifier via resistors R5 and R7. The control voltage for the output stage transistors Q6 and Q7 drops out at the emitter resistors R8 and R9. The collector and emitter connections of the output stage transistors are conntected to the pins. One application is driving a load or a transformer with centre tapping. The CA3020 usually works as a class B amplifier. However, it can also be used as a class A amplifier if the potential at the input is raised accordingly.

The resistors in the branches of the differential amplifier are unbalanced in relation to the individual values. This can only be seen here for resistors R5 and R7. The older schematics also note the asymmetry at resistors R1/R3 and R4/R6. However, this also shows that the ratios of the resistors on both sides are not fundamentally different. Why the circuit was not designed completely symmetrical remains an open question.




The housing is connected to the reference potential.






The dimensions of the die are 1,5mm x 1,4mm. 6059 is a typical project designation for RCA. The crosses in the right-hand area are used to check the alignment of the masks to each other.




The circuit on the die corresponds to the illustration in the datasheet. Some resistors are constructed in such a way that their contact areas and thus their resistance values can be adjusted more easily. The asymmetry in the differential branches is confirmed.




The two large output transistors are located on the right-hand side of the circuit. Each transistor consists of eight small transistors that are directly connected to each other. While the CA3020 is specified for a blocking voltage up to 18V, the CA3020A guarantees a blocking voltage of 25V.




Normally one would assume that the A variant is generated by binning the CA3020. However, this may have been different, at least for the first CA3020 parts. The layout of the CA3020 is illustrated in the magazine Electronics in August 1967. There the project designation is 5220 and the output stage transistors each contain just six individual transistors. The remaining geometries are slightly different, but the circuit is the same.

The different layouts and the fact that the A variant is not mentioned in the first adverts suggest that initially only the lower output power was planned and the circuit was expanded later. Perhaps the power was not sufficient for the planned applications or the designers were initially unsure whether the current distribution would still be sufficiently symmetrical with eight transistors. Perhaps the process has also improved.


https://www.richis-lab.de/Opamp81.htm

 

[RoGeorge]

Under Fig.1, the text says R values may be +/-30%.

• is that tolerance between batches, or between the resistors on the same die?
• is 30% "normal" for untrimmed IC resistors?

Asking because 30% seems very big to me, when compared to discrete R.  For discrete resistors the largest tolerance I've seen in practice was E6 (+/-20%), and that was decades ago in some tubes circuits.  Wikipedia lists an E3, too, with +/-40%, but I don't recall ever seeing a resistor with +/-40%.  https://en.wikipedia.org/wiki/E_series_of_preferred_numbers