Opamps - Die pictures

[magic]

That's what I heard on multiple occasions, presumably due to die shrinkage (smaller transistors == more noise, afaik). Still, please post some data and how you measured it if you have them. That's because most people who make such claims don't provide details, and I'm a bit suspicious for claims without data, esp. when people talk about audio amplifiers. So much audiopholery around .

Well, quick and dirty, as I said
I set it for 60dB or 80dB gain using low value resistors (1 ohm is OK for the lower resistor) and fed the output to a soundcard for recording and spectral analysis with software (RMAA will do).
Caveats / tradeoffs:
- too high feedback resistance and Johnson noise may become non-negligible
- too low feedback resistance and the chip may fail to drive it
- GBW limit causes gradual roll-off at higher audio band
- watch out for output at the rail when the chip's offset voltage is too high
- put 50~100R in series with the output or it may oscillate
- I recommend soldering a board because parasitic resistance of breadboards may measurably add to low value resistors

You may not know the exact sensitivity of the soundcard and its frequency response at the low end, but even then comparisons can be made at least. I don't remember the details, but perhaps a few dB difference at the edge of my soundcard's bandwidth (10Hz) and little difference at 100Hz and above for TI. I also got my hands on some very old NE5534 from Philips and they were a fair bit worse than later production, including TI. From China, but for a variety of reasons I'm >90% confident they were legit

Potential improvements under consideration for future attempts:
- lower DUT gain to increase bandwidth, add a low noise post-amp to overcome the soundcard's 1/f noise (NE5534, LM4562, ADA797, LT1028, that sort of stuff)
- calibrate the soundcard's response with a precision white noise generator, this could perhaps be a ~100k resistor amplified by low flicker noise JFET opamp (OPA1641/140 looks promising)

[David Hess]

all of their linear ICs started failing testing, so they were without analog ICs to sell for several months and ended up buying analog ICs where possible from competitors to fulfill orders.

I heard this story too and I wonder how realistic it is. How likely that parts from competitors meet same specs like noise, bias, drift, and other parameters?

It is very likely when they are alternate sources for the same parts.

[exe]

Well, quick and dirty, as I said

Thanks for sharing details. Did you use shielding? I've built an LNA from single ad8428 (fixed gain 2000 or ~66db), and in my environment it very easily saturates. I'm still yet to learn how to use it. I bought a metal candy box for shielding, only inside the box it is possible to do something with it, otherwise I see a square wave from rail to rail.

[magic]

No shielding, just assembled it on my desk, gave it a floating linear PSU and ignored the spikes at multiplies of 50Hz
Despite high gain, this circuit is not very susceptible to noise thanks to low impedances everywhere.
As usual, minimize the traces on IN-, connect the gain resistor to ground close to IN+, take the output ground from there.

[Noopy]

Today I have a Apex PA240 for you: +/-175V, 60mA, 120mApeak, 3MHz, 30V/µs.




In the datasheet there is a simplified schematic. ...it looks like they have painted the transisors one by one in powerpoint or a similar special tool... 






Unfortunately the die is coated with some pretty tough varnish. Decapping results in some minor damage. 
The PA240 uses two metal layers and some pretty special looking transistors.




The design was developed in 2004 and today it´s already obsolete... 




Here you can see the input stage.




The two input signals are routed close to each other and are shielded with the negative supply potential.
In the input lines there are 2*6 resistors. The resistors look like they were tuned. On top of the left resistors there is a short circuit which is absent on top of the right resistors.




The input transistors are quite big. The source resistors are split in eight resistors which are connected crossways for low temperature drift.
In the lower right and left corners there are the four input protection zener diodes.




Above the input transistors there are four crisscross connected transistors which do the current mirroring.
And we see again crisscross wired source resistors.




In the output stage the highside and the lowside each uses three big transistors.




The power transistors look similar to the "normale, discrete" power MOSFETs.


https://www.richis-lab.de/Opamp27.htm

 

[exe]

 I'm surprised how leads are close to each other for such a high-voltage device (350V max total power supply).

[Noopy]

Datasheet states:
"High  voltage  considerations  should  be  taken  when  designing  board  layouts  for  the  PA240.  The  PA240  may  require  a derate  in  supply  voltage  depending  on  the  spacing  used  for board  layout."
350V is possible but it's quite tight.

[magic]

Are you really sure that all matched transistors are cross-quads except for the input pair? That seems rather weird

[Noopy]

Are you really sure that all matched transistors are cross-quads except for the input pair? That seems rather weird

Well the picture quality isn't perfect but I'm pretty sure the input transistors are only two... 

[Noopy]

Today I have a comparator, a LM306, for you:








https://www.richis-lab.de/Opamp09.htm


It´s a comparator, not a normal opamp. Note the difference. 

UPDATE




I have identified the parts on the die. Thank god the LM306 is not too complex.






The manufacturing process is "quite simple". You have a p-doped substrate. On top of the substrate you apply the heavily n-doped collector connector (first brown mask). Then you apply a uniform n-doped layer over the surface. To isolate the components a heavily p-doped fence structure is organized with the second, dark green mask. On top of the collector connector the base area get´s p-doped (light green mask). The red mask gives you a strong n-doping to form the emitter and the connection to the collector connector. Finally vias are etched with one mask and metal layer is formed with the last mask.
You can find some blur in the via mask. Perhaps that is the beginning of corrosion. Eventually the protective silicone oxide on top of the die is removed and there is no metal layer closing the hole.




While the small transistors can withstand 15V the big one at the output is specified with 24V. To achieve the higher breakdown voltage there is a wide frame built with the base material around the transistor. The lower doping gives you a higher breakdown voltage. 




After seven month in a "normal" enviroment (15-25°C, <60% r.H.) the die shows quite a lot of corossion. 
Perhaps the silicon oxide protection layer is damaged after all these years (like seen in the MAA723: https://www.richis-lab.de/LM723_04.htm).




Lights on! 






With a slow rectangle signal at the input you can see the LM306 circuit changing the current pathes. (top=>down: D1, D2, D3)
Video: https://www.richis-lab.de/images/Opamp/09x13.mp4
You can see that the output transistor is never switched off completely


https://www.richis-lab.de/Opamp09.htm

 

[magic]

After seven month in a "normal" enviroment (15-25°C, <60% r.H.) the die shows quite a lot of corossion. 

Do you mean those small spots?
Are you sure it's not just dust?

My dice catch similar crud after a few months of storage, but a wipe with IPA soaked cloth takes care of that.

[Noopy]

After seven month in a "normal" enviroment (15-25°C, <60% r.H.) the die shows quite a lot of corossion. 

Do you mean those small spots?
Are you sure it's not just dust?

My dice catch similar crud after a few months of storage, but a wipe with IPA soaked cloth takes care of that.

No, that is not dust. I'm sure with that. I have seen enough dust. 
I'm pretty sure that is something on the surface but in the silicon.
In the green areas the spots are brown. That has to be something like corrosion in the silicon.

[exe]

That has to be something like corrosion in the silicon.

My best guess is it's something to do with manufacturing. Like, reagents were not properly washed (I assume the can was hermetically sealed).

[Noopy]

Just to clarify: After opening the package the die was perfectly "clean" as you can see in the pictures. The dots came after 7 month in normal atmosphere.

[Noopy]

Toshiba TA75558 dual-opamp




The circuit is quite common.
There is a small mistake. Around the bias circuit for the output stage there are two connection dots missing (one the right side, on the left side the mistake is corrected).
I´m not perfectly sure about D1. What exactly is the purpose of this diode? A DC-path to the output? In theory without external circuitry the output level is undefined. (@magic?  )




The die is 1,4mm x 1,2mm and quite symmetrical.


#

Identifying the parts is no bigger problem.
In the input stage there are round pnp-transistors.
They used pinch resistors to save silicon area. It´s interesting they didn´t use a pinch resistor for R1 therefore it got very long.
C1 refers to the negative supply and because of that just needed a green area against the substrate. In contrast C2 uses the green layer and the metal layer.




D2 is integrated on both sides of the die but got connected only on the right side.




Q15 and D2 are not really easy to spot.
The J-FET Q15 seems to consist of an area that is connected to Vcc and the bias circuit in the upper right corner. On top of this area there is a layer connected to Vee. The lower layer is probably n-doped and the upper layer is p-doped so you get the J-FET you need.
There is a reddish stripe going into the Vee-area. That´s probably the highly n-doped emitter material which gives you a zener to Vee.




Q10, D1 and C2 are also interesting parts.
Q10 collector potential is the same as the potential of the lower C2 electrode. Because of that Q10 has no own collector contact but is integrated in the surrounding n-doped area of C2. Since the lower electrode of C2 is highly n-doped and there is a buried highly n-doped layer under all the parts there is a low impedance connection between Q10 collector and the lower potential of C2.
D1 is connected in parallel to C2. Because of that D1 is constructed by integrating a small p-doped area in the n-doped area around C2 and connecting it to the upper metal electrode of C2. You can see the outlines of the contact and the p-doped area in the metal layer.




The output stage contains two big transistors with one dual emitter resistor and the output resistor leading to the output bondpad.
The output stage bias circuit is integrated in a small area that acts as a collector for both transistors.


Some more pictures:

https://www.richis-lab.de/Opamp28.htm

 

[exe]

I'm surprised how many (cheap) opamps use jfets inside. My understanding is, they are very unpredictable. At least discrete ones. So, does it mean jfets inside ICs have tighter tolerances, or circuits simply don't care if there is a, say, 5x variation to Idss?

[Noopy]

Often these J-FETs just have to act as cheap current sources.
In my "glowing-LM723-pictures" we have seen that such a J-FET current is changing quite heavily with voltage. But it´s ok to get a bias reference out of a zener.

[Noopy]

I´m not perfectly sure about D1. What exactly is the purpose of this diode? A DC-path to the output? In theory without external circuitry the output level is undefined. (@magic?  )

Aha! D1 prevents saturation of Q6 and Q10 of course! 

[magic]

Of course.
BTW, you swapped Q2 and Q3 on the annotated die image
Input stage layout looks a bit lame, it seems needlessly sensitive to thermal gradients generated by the output stage. RC4558 (which this chip is probably equivalent to) has the input transistors horizontally; see zeptobars.

The N-JFETs widely used for biasing are so-called "epi-FETs" and they are quite terrible: poor tolerance and their gate can only be ground. They typically drive shunt references (here: D2) or similar things so none of it matters.

The P-JFETs used in TL072/LF155/etc require some additional processing IIRC and offer TL072/LF155-level performance, by definition
One trick that TL072 uses to improve JFET matching is the "common centroid" input stage arrangement also used in precision bipolar opamps.

Some CMOS opamps take it even further, the LMC6001 has 16 input transistors in two sets of 8; also on zeptobars.

[Noopy]

BTW, you swapped Q2 and Q3 on the annotated die image

Thanks! I have corrected the numbers. 

Input stage layout looks a bit lame, it seems needlessly sensitive to thermal gradients generated by the output stage. RC4558 (which this chip is probably equivalent to) has the input transistors horizontally; see zeptobars.

Yes this design doesn´t look very sophisticated...

[David Hess]

I'm surprised how many (cheap) opamps use jfets inside. My understanding is, they are very unpredictable. At least discrete ones. So, does it mean jfets inside ICs have tighter tolerances, or circuits simply don't care if there is a, say, 5x variation to Idss?

Those are "pinch resistors" which implement a high resistance which is not otherwise practical.  They might be shown on the schematic as a JFET or resistor but sometimes you can find them marked as a resistor with a adjacent parallel bar connected to one end representing the JFET gate connection.

They are especially useful for startup circuits where poor tolerance is not a problem.

[magic]

The term "pinch resistor" usually refers to resistors made of base material (P silicon) pinched by emitter material (N silicon) which also contacts the underlying collector silicon (N) on both sides of the P resistor. We have seen a ton of those on Noopy's images. They are indeed somewhat like P-JFETs and they saturate at higher voltages. The P-JFETs in BiFET processes are built in a similar manner, but are spread over more area and require higher fabrication precision than BJT bases and emitters. IIRC they had to use ion implantation for that, instead of diffusion.

The N-JFETs on traditional bipolar processes (epi-FETs) are long and narrow isolation islands surrounded by P substrate and P isolation walls and covered on top by (rather shallow) P base diffusion. So a different kind of structure, much larger and harder/impossible to fabricate with precision, and the gate is always the substrate.

Relevant drawing from old Signetics applications manual below.

[exe]

Ah, got it. What is the problem with creating high-value resistors in IC? I remember reading somewhere that one of challenges in early ICs was to design circuits with resistors in the range of, say, 1-10k.

[magic]

Because there is no highly resistive material available. Resistors on cheap ICs are made of doped silicon, and you don't want doped silicon to have too high resistance because you don't want 10kΩ in series with every transistor terminal

And of course you can make ristors of any value, they just need to be loooong.

[Noopy]

And so you have to integrate veeeeeery looooooong tracks.