0.13x vs 1.0x gain op amp regulated power supply - fail

[HendriXML]

Hi,

I did some characterization of a IRLZ44N via a power supply https://www.eevblog.com/forum/testgear/this-graph-brings-tears-to-my-eye/msg2190639/#msg2190639.
Did also some curve fitting and came to the hypothesis that it should be possible to drive such a reactive component with very low gain. Here is an ongoing little experiment in which I will examine the possibilities.

First about the schematics:
It is essentially a differential 1 gain amplifier, with the reference voltage at the gate! To keep it from being a fast positive feedback, there is are a few capacitors to suppress that from happening. Given more time the ref voltage settles and Vsg become about the same.

What are the benefits of this solution compared to high gain feedback ones?
There is/should be less overshoots. There's no (relatively) large inrush current to the Mosfet gate (the gate capacitance), because this will be smoothed by a short and fast feedback loop (via R4). Resistor R12 which kind of separates the loops is therefore critical. At first I didn't have this resistor in the circuit and the outcome was rubbish.

The negatives of the circuit I will explore. It probably drops in voltage with a very sudden increase in current. Like going from 1mA to 1A. I’ll do some measurement later on.
It’s uses also quite some idle current because of the Zener diode reference voltage.

One of the attachments shows the noise while driving a DC low RPM motor at 700mA.
Feel free to discuss and comment on this experiment. (I will eventually use it as a 5 x AA battery to 5V regulator). It is with persistence on, so a 5 sec representation of the noise.

[Kleinstein]

The amplifier (e.g. OP) is only one of the noise sources in the voltage regulator. It may be relevant at higher frequencies.
The other important noise source is the voltage reference itself, especially at lower frequencies, as essentially all voltage references have quite some 1/f noise.

In the current circuit there is a resisive divider (:2) and the relatively large resistors (47 K that add to the noise -  so it would not be very low noise).

The circuit uses an output stage that controls the current (the MOSFET controls the current via the gat voltage). Because of the rather high trans-conductance of the MOSFET, the overall loop gain may not be that small. The rather simple loop structure with mainly the output capacitor as the bandwidth limiting part may work well with some loads, but may not work well with other loads. The MOSFET is also rather nonlinear and will respond stronger at high current. So the response is to be expected very slow at low current and may be acceptable (and possibly to fast resulting in oscillation) at high current.

The ESR of the output capacitor can have quite some effect on the response - too little may be a bad idea.

[HendriXML]

The circuit uses an output stage that controls the current (the MOSFET controls the current via the gat voltage). Because of the rather high trans-conductance of the MOSFET, the overall loop gain may not be that small.

Hi, thanks for reacting!

In the supplied link I did some measurements on the Mosfet voltage rise on source-drain vs needed Vgs compensation ratio.

What came out of the graph that the regulation of current might not lineair, the voltage rise isn’t as well. If one compares them then the compensation ratio seems not that widely spread.

I spoke of noise, but I mean all the stuff you don’t want on the output. 

From what I’ve seen it does a great job, but I wouldn’t know how to do a proper benchmark. I know for example the output is cleaner than that of my bench power supply. But it’s got longer leads to the DC motor load.

The posts are also about how to investigate things (with limited means) and learn from the comments.

I guess power supplies are a great way of doing this kind of exploration.

[Kleinstein]

A voltage regulator looks like a simple beginners circuit and it kind of still is.  However when looking at the theory behind it a voltage regulator can be quite a complicated beast, one can write books about. There is a lot of theoretical background that may be needed to really understand it in detail. If one really understands a lab supply it something like half way to the EE degree  .

For the "noise" one normally uses this word for the noise coming from the regulator when used with a simple resistive or similar well behaved load. The extra AC part seen with a more nasty load like a DC motor is normally described with by the output impedance. So how much change in output voltage when the load current changes. So it is more about applying an AC current (superimposed to the DC load) and measuring the AC voltage.

For doing this one frequency at a time it would need something like a function generator and a Lockin amplifier or similar instrument. The voltage may well be to small to directly measure with the scope - though with a simple not that good regulator the scope may be sufficient.

The more common test is in the time domain, looking at the step response when the load current changes from something like 10% to 60% of the nominal load (The load levels vary - not sure there is kind of standard case) and back.  Ideally this may need a special switchable load. With a modern DSO to measure one may get away with just 2 resistors and a suitable switch / relay.  Some older lab supplies (e.g. 1960s-1970s) use such curves to show there performance. It is still a good test.

[HendriXML]

The ESR of the output capacitor can have quite some effect on the response - too little may be a bad idea.

One thing I’ll try to realize is that better specs don’t alway perform better. Voltage needs to drop (maybe a tiny bit) to get a regulation happening.
A capacitor that withstands a voltage drop, also withstands a compensatory voltage rise. One thing I was a bit disappointed in was that the circuit needs a capacitor (a 330uF was good as well). But I did take the best I could find and even measured it having a low esr. So something to keep in mind.

My other  design https://www.eevblog.com/forum/projects/bi-regulated-power-supply/ seems not to need one.

[HendriXML]

The more common test is in the time domain, looking at the step response when the load current changes from something like 10% to 60% of the nominal load (The load levels vary - not sure there is kind of standard case) and back.  Ideally this may need a special switchable load. With a modern DSO to measure one may get away with just 2 resistors and a suitable switch / relay.  Some older lab supplies (e.g. 1960s-1970s) use such curves to show there performance. It is still a good test.

I was thinking of using another mosfet in series with different load resistors and saturate it with a square wave signal, and see how it goes. The question I want to answer is what range it can regulate without significant drops. Somehow I think the integration of the ratio curve in the other post has a relation to it. My thoughts are if it’s less than 1 (or 0.5 because of the resistive divider), it’s okay. If its more, the reference capacitor needs to charge a bit further, so the output voltage will drop.

[Kleinstein]

There are mainly 2 types of voltage regulators:
1) Regulator and power stage which control the output current. Usually the output is from the drain or collector of the power fet / transistor. The circuit here is such an example.  These regulators essentially need an capacitor at the output and often quite some size.

2) Regulators with a low output impedance power stage, like an emitter follower or source-follower. Here one can get away without a capacitor at the output, though many circuits still use a relatively small capacitor to get better performance at higher frequency.

The gain of the differential amplifier is from the input voltage to the gate voltage. This is followed by the voltage gain of the mosfet, that depends on the trans-conductance of the FET and thus the current and the load seen at the output. So there is nothing special about the gain of 1 or 0.5 for the first stage.  The capacitor at the output makes sure the gain of the output stage (= MOSFET with load) will go down about like 1 over frequency towards higher frequencies. For this reason the capacitor is essentially needed.


The regulator circuit from the other thread looks like a real mess, much like a typical beginners try and error circuit, that might for some odd reason kind of work under some conditions, but several points that make one think how the heck could this work. The circuit here looks much better.

[HendriXML]

The regulator circuit from the other thread looks like a real mess, much like a typical beginners try and error circuit, that might for some odd reason kind of work under some conditions, but several points that make one think how the heck could this work. The circuit here looks much better.

My main purpose isn’t to make a power supply, but to test idea’s to let my knowledge about this stuff grow. I really like the other one a bit better, it makes me smile thinking about it. . I know it’s horrific to professional standards and shouldn’t be used other than in an experimental/supervised situation. But that’s also not the intended angle to look at it.

But I’m indeed just starting and lacking a lot of insight, doing experiments and sharing those is a fun way to increase it. In my experiments I try to focus on only a few elements - discarding others I know and even more I don’t know and hoping to get some surprising result. 

[HendriXML]

The gain of the differential amplifier is from the input voltage to the gate voltage. This is followed by the voltage gain of the mosfet, that depends on the trans-conductance of the FET and thus the current and the load seen at the output. So there is nothing special about the gain of 1 or 0.5 for the first stage.

To my understanding such a low gain in the first stage can only work if there’s some offset or voltage lift towards the Mosfet gate. Any idea how this normally is implemented/controlled?
Gain is one way to look at it, but in reality nothing is amplified (like a voltage follower). So the way I also thought about it was there is a short and a long feedback loop. One before the Mosfet gate being fast without capacitance/inductance problems and one a bit slower through the Mosfet making the balancing more controlled because of the other short loop. Does that make any sense?

[HendriXML]

Did some measurement with a signal generator driving a Mosfet which pulls a resistor low.

The measurements (peak to peak) are down below:

Resistor	Siglent powersupply	My circuit
5R1	2.68 V	0.59 V
6R8	1.84 V	0.48 V
10R	1.52 V	0.36 V
15R	1.36 V	0.26 V

My circuit also restores the voltage a bit faster in time. I didn't expect that my circuit would do so wel under such a sudden load.

The green line is the signal to the Mosfet gate from the generator, which isn't the fastest thing around (also 50 ohm output).

[HendriXML]

The question I want to answer is what range it can regulate without significant drops. Somehow I think the integration of the ratio curve in the other post has a relation to it. My thoughts are if it’s less than 1 (or 0.5 because of the resistive divider), it’s okay. If its more, the reference capacitor needs to charge a bit further, so the output voltage will drop.

From the measurements done above this does not seem the case.
That raises also the question about how important the raising of the ref voltage is.
Or wether it is possible to drive the Mosfet with even lower "gain".

To bad I've soldered the resistors down so that isn't just a quick check. The legs are also the traces...perfboard experimenting issue.

[HendriXML]

I wanted to make sure that the constant current mode of the Siglent had no part in the voltage drop, so I did new measurements with the CC up to max (3.2 A)

Resistor	Siglent powersupply	My circuit
5R1	2.08 V	0.60 V
6R8	1.90 V	0.50 V
10R	1.62 V	0.40 V
15R	1.36 V	0.30 V

[xavier60]

It looks like you are using positive feedback to increase gain at DC and low frequencies?

[HendriXML]

It looks like you are using positive feedback to increase gain at DC and low frequencies?

Yes but with some delay. The idea is that it settles on a value so that a even a little effort of the “diff amp” has still some effect. To keep the volts/sec low.

[xavier60]

An op-amp configured as a non-inverting amplifier with a feedback capacitor from the op-amp's output to inverting input will give the same result plus even more gain at DC. This will reduce the regulators steady state output voltage error to less than a millivolt if the layout is done right.

BTW, your output stage is current sourcing into a capacitor. For the feedback loop to be stable in this situation, the error amplifier(op-amp) needs to have some proportional gain. An op-amp configured as mentioned above has a gain that can only drop to one at higher frequency. This is well suited.

[HendriXML]

An op-amp configured as a non-inverting amplifier with a feedback capacitor from the op-amp's output to inverting input will give the same result plus even more gain at DC. This will reduce the regulators steady state output voltage error to less than a millivolt if the layout is done right.

BTW, your output stage is current sourcing into a capacitor. For the feedback loop to be stable in this situation, the error amplifier(op-amp) needs to have some proportional gain. An op-amp configured as mentioned above has a gain that can only drop to one at higher frequency. This is well suited.

I think I understand most of what you say, but just to be sure I made a schematic. Will also use that to think things through and see the benefits. Losing the positive feedback is probably one of them. The change has some "double inversion" (low band -> highband, positive fb -> negative fb) to it, so it will probably change some characteristics too.

[HendriXML]

Looking at the schematics I think you mean loosing the diff-amp stuff too, like so.

[HendriXML]

To my understanding such a low gain in the first stage can only work if there’s some offset or voltage lift towards the Mosfet gate. Any idea how this normally is implemented/controlled?

I think the proposed schematics answers that question. Saves a lot of resistors  .

[xavier60]

A balanced input amplifier would be useful possibly for sensing voltage at the output terminals. I haven't given it much thought though and I have never been able to justify the need in the power supplies that I have built.

[HendriXML]

One difference in the proposed schematic is that the capacitor is now sourced via R5. So a sudden increase in the supply voltage, might pull on the gate wouldn’t it? A phenomenon which has to be regulated, and might have effects on the output.

[xavier60]

One difference in the proposed schematic is that the capacitor is now sourced via R5. So a sudden increase in the supply voltage, might pull on the gate wouldn’t it? A phenomenon which has to be regulated, and might have effects on the output.

Yes, fluctuations of the input voltage will disturb the regulation. With the so called "floating type" regulator topology, all of the control circuitry is referenced to the MOSFET's Source which is also the positive output terminal. But it requires the extra floating rails to power the control circuitry.

[HendriXML]

One difference in the proposed schematic is that the capacitor is now sourced via R5. So a sudden increase in the supply voltage, might pull on the gate wouldn’t it? A phenomenon which has to be regulated, and might have effects on the output.

Yes, fluctuations of the input voltage will disturb the regulation. With the so called "floating type" regulator topology, all of the control circuitry is referenced to the MOSFET's Source which is also the positive output terminal. But it requires the extra floating rails to power the control circuitry.

This all pulls a bit hard on me brain, ha ha.
One possitive aspect of the initial schematic might thus well be that the “offset” is more tied to the ground/source.

[xavier60]

One difference in the proposed schematic is that the capacitor is now sourced via R5. So a sudden increase in the supply voltage, might pull on the gate wouldn’t it? A phenomenon which has to be regulated, and might have effects on the output.

Yes, fluctuations of the input voltage will disturb the regulation. With the so called "floating type" regulator topology, all of the control circuitry is referenced to the MOSFET's Source which is also the positive output terminal. But it requires the extra floating rails to power the control circuitry.

This all pulls a bit hard on me brain, ha ha.
One possitive aspect of the initial schematic might thus well be that the “offset” is more tied to the ground/source.

That is a bit tricky to nut out. I often see in high performance supplies a conventional 4 resistor balanced amplifier to sense the rail voltage and scale it down. This scaled down voltage and reference voltage is fed into another op-amp functioning as the error amplifier. All of this  can be referenced to the MOSFET's Source pin.
I hope I have that right.

[xavier60]

Also, the op-amps won't have to be powered at the full input voltage.
The balanced amplifier would need to have near perfect CMRR to prevent input voltage variations affecting regulation voltage.

[HendriXML]

The MOSFET is also rather nonlinear and will respond stronger at high current. So the response is to be expected very slow at low current and may be acceptable (and possibly to fast resulting in oscillation) at high current.

This is something I'm tried to find out in the supplied thread and if I'm not mistaken (maybe someone is willing to verify that?) more amplification is needed at higher currents. The Mosfet becomes more sensitive, but the voltage (source-drain) raise/amp decreases faster.


I will test the initial circuit with minimal gain using the graph: 1/4 from the diff. amplifier * 1/2 from the divider. 1/8 should still work. Maybe then we'll also see a larger voltage drop at a sudden load.