So here's the watchdog circuit from a board used in a load management terminal / field configuration terminal.
WD_In is the Watchdog input, and is fed from the CA2 pin on a 6821 PIA (and there are places throughout the load management terminal code where the pin is bumped high or low).
Reset is obviously the main reset line, and obviously gets driven low if this circuit doesn't see WD_In change within a given interval.
WD_Out is tied to one of the two IRQ lines on the microprocessor, and there is code that gets run whenever it sees activity on the IRQ lines.
Two questions:
What components are responsible for setting the watchdog timeout interval?
In the field configuration unit, the two indicated components are omitted from the circuit.
The code for the field configuration unit does NOT manipulate WD_In, and there is no code servicing the IRQ generated from WD_Out.
What exactly is the effect of removing those resistors?