I'm trying to design a power delivery network for a low noise analog system, but I think I've gone down the power supply rabbit hole
and not sure if I'm taking a reasonable approach.
Basically taking in a 24v isolated supply and need a lot of output rails, in addition to retaining the 24v for stepper motors. Something like +/-14.25v, +/-5v, and +3v3 rails. Each of those rails is going to be powered by an RF LDO off either +/-15v switcher-supplied rails.
I also know from an existing design that peak current is less than +/-333mA, because I was using a Recom RP10-2415DE as the switcher to feed the LDOs. But from analyzing that design it seems typical peak current is closer to 50mA and quiescent is only ~10mA which isn't reaching the 10% minimum load spec of the switcher. Worst case peak is only like +/-120mA (short circuited opamp outputs).
There are a couple other problems with the Recom supply for this application too - EMI filter is huge, switching frequency is in band, and the availability can be hit/miss. And then the price - $60 is nothing to scoff at.
So it seems like it's worth designing my own switcher to take it's place. I think I don't need isolation because the 24v is now an isolated supply (it wasn't before), and the first thing the output filter did was undo the isolation
. So far it looks like this makes the design much easier. I do want low noise and a simple BOM to maintain though, ideally in a similar total solution size.
I've gone through several attempts at a replacement - started with SEPIC but only figured out after a day of work that the loop compensation was going to be touchy
. I tried using TI's WEBENCH but the designs don't seem that great, and the negative rail doesn't simulate. It does seem at this point (that is, after several days of research) that I should be able to come up with a stable, reasonable solution that using the same kind of chip to control the positive and negative supplies, but I'm having trouble figuring out the next step.
Now I'm trying to figure out ADI's silent switcher products. I looked at the gen 3 stuff but the input range is only 18v - so that's out. Looking at the Gen 2 I've settled on the LT8350S but I'm not sure if that's a reasonable approach or I'm just going to burn another 3 days in simulation
.
TLDR: For an LT8350S
- Does it make sense to use 1 for a +24v to +15v buck and another for Inverting Buck Boost +24v to -15v? Or is it better to pull from the +15 for the -15 IBB to put less stress on the FETs? How do I size the passives for my design? I also really can't figure out where the current limits come from on this topology?