Author Topic: Help identifying this SMPS control loop issue- "Latent overshoot"  (Read 969 times)

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Offline TimNJTopic starter

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Hi all,

I'm at my wits end. (Happens often for me  ::)) I've been trying to optimize the transient response of an offline flyback converter for the last few days. I'm using the TEA18362T QR/DCM flyback IC with burst/skip-mode function. The issue I'm experiencing has some relationship to switching between loads in burst-mode and in continuous mode. Load stepping between two loads in continuous modes doesn't cause any issues.

For a no-load to full-load transition, the control loop seemingly "wants" to stabilize back to the target DC voltage, but for some reason, after it's reached the target, begins creeping up another 200mV or so over a span of ~5ms and takes another 5-10ms to recover back to the target DC voltage.

I've made seemingly 100's of changes to the secondary side 431 error amplifier circuit, and essentially nothing will stop that behavior. You might note that there is some little flutter/oscillation as the output attempts to stabilize. This is the controller attempting to put the power supply in burst mode (mistakenly) and then quickly popping back into continuous mode, and then mistakenly trying to put it into burst mode again...That may be part of the issue... but, a day or two ago I got it to stop doing that, but it still overshot by 200-500mV afterwards.

Here are some things I've hypothesized and tried:

1. The optocoupler emitter current is regulated at 100uA on the primary side in burst mode, to minimize loss. Maybe the 431 is starved. It is a low current type with 50uA bias current typical. When it switches into continuous operation, the controller switches the feedback sensing to a typical pull-up resistor arrangement. Tried reducing the value of resistors attached the the 431 cathode.

2. Tried decreasing the resistance of the secondary-side divider string by 2.5x, thinking maybe I was running the AP431S too lean.

3. Thought the bulk-cap voltage was sagging a lot under load, causing input voltage compensation to get whacked out and over-compensate. I tripled the bulk cap capacitance, reducing the sag to almost nothing, but overshoot on secondary remained exactly the same.

4. And loads of changes to the 431 compensation circuit. I've added a lead compensator which has help limit the oscillation in and out of burst-mode, and improved response time. (Not shown in schematic.)


So, I'm not sure where to look next. I'm thinking it's either something specific to the TEA18362T, some sort of slow servo on the optocoupler feedback pin, or some completely different phenomena. Could it be something to do with stored energy getting "forced" into the output? I'm thinking something with the transformer, or some inductance somewhere...

Please! Any ideas? Thank you.


P.S. I can't find my USB flash drive, and I'm staying out of stores for the sake of COVID-19, so the scope shots are photos taken with my phone. Please excuse the crudity.
« Last Edit: April 01, 2020, 01:06:58 am by TimNJ »
 

Offline T3sl4co1l

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Re: Help identifying this SMPS control loop issue- "Latent overshoot"
« Reply #1 on: April 01, 2020, 03:00:45 am »
Component values?

Also, what's the controller side look like?  Basically verbatim from typical application?

Block diagram seems to show hysteresis around the burst or BCM transition band (CTRL ~ 2.5V), or maybe it's 0.5V or maybe it's timed, I don't really know, it's a really odd diagram and everything is everywhere.

It doesn't look like it's intended to produce terrifically smooth output, and if you need that, consider following it up with an LDO I guess?

Tim
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Offline TimNJTopic starter

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Re: Help identifying this SMPS control loop issue- "Latent overshoot"
« Reply #2 on: April 01, 2020, 03:52:50 am »
Thanks for responding, Tim.

For the error amplifier,

24V output

R26 (master gain): 1.2K
R27 (LED bypass): 2.2K
C17 (integrator): 33nF
R28 (integrator): 47K
C19 (HF comp): NU
R29 + R30: 86K
R31: 10K
U3: AP431S (not I)
U4: 817C

Across R26 is 68nF + 150R for the lead comp network.

The switch between burst and continuous mode (in frequency reduction) is when the voltage on CTRL goes below 0.5V. The controller exits burst mode when it counts 40 pulses in one pulse train. Though, now that I think of it, is kind of crazy if that's completely true. Supposing 25KHz switching frequency, 40 pulses is 1.6ms. That's really pretty long, all things considered. I can see how that might be a problem for the "glitching". But I still can't explain that long hump after the fact.

Thanks!

 

Offline T3sl4co1l

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Re: Help identifying this SMPS control loop issue- "Latent overshoot"
« Reply #3 on: April 01, 2020, 08:18:31 am »
Values sound reasonable, time constant a bit on the high side maybe, but I would then guess there's relatively high output capacitance, that's about it; looks like the controller is able to respond nice and quick despite that, *shrug*.  Or if output capacitance isn't that much, maybe that accounts for the hump in continuous mode, and the lead comp is what's giving the apparent fast response in the first 100s of us.

It may be a good point to add instrumentation to see what's really going on.  Can you probe the controller COMP pin?  Duty cycle?  Not much window into its internal state unfortunately, but maybe a cursory check is all that's needed.

Noteworthy that, when it switches to a CCS pullup, the loop gain is super high, all but guaranteeing oscillation.  Fortunately, that's the point, it's in burst mode.  So the burst rate may be defined by the 431, which is being used more as a comparator in this condition.  But then when it pulls into continuous mode, the stronger pullup gooses the throttle before the 431 can catch up to turn it down (or further up, as the case may be).

It's not obvious if this should be a problem; it may give a load-dependent overshoot, i.e., there's an injected charge sort of thing, which helps for a matched load as it were, but undershoots at heavy load and overshoots at light load?

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 
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Offline TimNJTopic starter

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Re: Help identifying this SMPS control loop issue- "Latent overshoot"
« Reply #4 on: April 01, 2020, 04:16:20 pm »
Thanks again Tim.

So, you're suggesting that the hump might be a result of low output capacitance? What mechanism might explain that?  Two days ago I tried tacking another 30-40% capacitance on the output and I don't remember seeing an appreciable change. I will check again though.

At the 500us mark, post load step, the control loop seems to have it right, returning the output to the target voltage, but then seems to get a little lackadaisical afterwards. For load steps between, say, 30%-100%, there is no such 10ms long hump, which seems to be correlated to the fact that there is no "mode jump" between optocoupler regulation modes. I wonder if it's in any way related to the choice of optocoupler. I've seen some issues where the optocoupler has trouble breaking out of a deep saturation state.

It's definitely true that the lead comp has improved the response time, compared to before. In the original configuration, it took 500-600us to even get a gate drive pulse out of the primary side controller. Now you can see it's on the order of 100-200us.

Which COMP pin are you referring to? The CTRL pin on the primary side controller?

Thanks again!
 

Offline T3sl4co1l

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Re: Help identifying this SMPS control loop issue- "Latent overshoot"
« Reply #5 on: April 02, 2020, 03:48:20 am »
Sorry yes, CTRL pin.  It's COMP on everything else (with an internal error amp)...

Output capacitance and compensation dominant pole are just whatever they are, presumably you've figured those out already, at least for one condition or the other.

Current source pullup should be defeatable with a load resistor.  (Er, did the 7V internal VCC come out to a pin?  Maybe have to hack something from aux supply.)

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline foobie

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Re: Help identifying this SMPS control loop issue- "Latent overshoot"
« Reply #6 on: April 18, 2020, 10:19:39 am »
I believe the zero is around 100-300Hz if I am not mistaken by the timebase.
So this is the low-freq range which is basically handled at the comparator integrator at the PWM or QR chip.

If this was some UCx84x, then I would tell you to alter the RC network at the COMP pin which basically adds the zeros at low freq.

As far I can see, the chip you are using does not have a op-amp out pin. Then, you best shot is modifying the possible RC network at the inverting input.
Recall, f = 1/2pi RC. So try increasing the zero freq. by either making R or C smaller.

I recall that, you cannot shape this bode diagram by modifying the low-side feedback, they are poles for the zero after the cross over freq.
 
 


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