Hello everyone,
A friend and I are currently designing a battery charger for our project.
After some work we finally nearly finished the layout and wanted to start printing the layout but a question occured:
Place inductor input as close as possible to switching
FET’s output connection. Minimize the surface area of
this trace. Make the trace width the minimum amount
needed to support current—no copper fills or pours.
Avoid running the connection using multiple layers in
parallel. Minimize capacitance from this node to any
other trace or plane.- Design guidelines from the LTC4006 datasheet
hence: under the switch node section: PH7030L, TPC8128,L1, D1 can there be a ground plane or would it be better not to have one?
If you look at the attached picture we did a copper fill at the node but it would be as if we would use a wire because it all is as short together as possible, do you think that also could make some errors or is it neglectable?
also do you see other design issues if so please let me know
Edit 1: PS our inductor is shielded.
Edit 2: it seems near the C5 Cap we need a via.
Edit 3: here is the link to the LTC4006 datasheet:
http://cds.linear.com/docs/Datasheet/4006fa.pdfstating page 17 are the design guidelines
cheers.