Author Topic: Multislope Design  (Read 85582 times)

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Offline Rerouter

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Re: Multislope Design
« Reply #325 on: August 03, 2019, 09:47:01 am »
The 7V buffer, is that direct, or still using the RC to its input?

Also for the input amplifier, you could still use a bootstrapped AZ amp with a lower supply voltage, for the other inputs, if it was fleshed out with current (electrometer) and resistance (same as before with some current sources), that would be after an amplifier anyway, so its really only outside world voltages that may need buffering.

Would also like a walk through on exactly how the modulation works, Jaromirs Thread begins to touch on it, but doesnt really explain the specifics. and I'm still pretty new at interpreting assembly. my current mental picture is closer to a delta sigma, but that doesnt quite seem right.
https://www.eevblog.com/forum/metrology/diy-6-5-digit-voltmeter/?action=dlattach;attach=749595;image

https://datasheets.maximintegrated.com/en/ds/MAX328-MAX329.pdf - Low charge injection alternative for the DG408 that is pin compatible.

https://datasheets.maximintegrated.com/en/ds/MAX4051-MAX4053A.pdf - Low charge injection and lower leakage alternative for the 4053 that is pin compatible.
« Last Edit: August 03, 2019, 09:52:28 am by Rerouter »
 

Offline Rerouter

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Re: Multislope Design
« Reply #326 on: August 03, 2019, 11:11:55 am »
was doing a deep dig through the LM399 thread and came across "Mickle T"'s schematic for his own "8.5 Digit ADC" the overall design seems fairly similar  wondering if there is anything that can be gleaned from it that could help get around some of the current limitations..

Direct link to the post, however most of it is in chinese, https://www.eevblog.com/forum/metrology/lm399-based-10-v-reference/msg589601/#msg589601
 

Online Kleinstein

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Re: Multislope Design
« Reply #327 on: August 03, 2019, 02:00:59 pm »
I would think about using the buffered 7 V from the filtered point at C13, not directly from the LM399.

For the input buffer before the MUX a bootstrapped AZ OP is an option. At least a buffer is relatively easy, it gets tricky to make it an amplifier with a bootstrapped supply for the input. It is complicated, but possible.

The Bootrapped buffer could look like the one Mickle suggests. The rest of that ADC circuit is relative close to the Solartron DMM, with a few improvements due to more modern parts and the simplification of using only one modulated reference. As there is resolution only from the comparators the numerical resolution is low and alone from this reason that ADC type is slow (I would expect it to be just a little fast than the Solartron original). So more like a few seconds for 7 digits and maybe 1 minute for 8 digit resolution. The noise level is also relatively high. It is a different kind of ADC, so not that much to really copy from there.

The modulation part during run-up in my ADC version is rather similar to a first order sigma delta ADC. AFAIK Jaromirs design is not that much different in the modulation - just slightly different timings, but nothing dramatic. My integrator would probably be OK with the modulation Jaromir used and vice versa. The main idea is to have a fixed frequency and switch sequence, switching between the positive and negative reference. Only the time when one transition is done changes depending on the comparator. One can call this a 3 step sequence with fixed positive (e.g. 1 µS) phase, fixed negaitve (1 µs) phase and comparator dependent  phase (positive or negative) for some 20 µs. This version of the modulation / feedback is about as simple as it can get. I initially had a slightly more complicated version, but this one did not work out so well.

For the switches: I have tried the max4053 - it worked but not as good as the currently used 74LV4053. The LV4053 is also low charge injection, but likely faster and with less current pulse on the supply. Charge injection on it's own is not so bad, it would be only variations in charge injection that cause trouble. A possible alternative version to test would be DG4053E - it may have some advantages from low leakage and low charge injection.  So far I have tested: (ST) 74HC4053, (Ti) CD74HC4053, HEF4053, max4053 and (Ti)74LV4053. The HC4053 from ST was worst and the LV4053 best, and the other about similar in performance. However the differences were not that large and the chips may have different weaknesses - it is not just one parameter, more like a good compromise. Also different bathes may be different a little.

For Jormirs design and the one from Mickle, the switching is at the reference side and thus needs higher voltage switches. There charge injection may be less critical at first sight, but it still effects the buffer for the reference voltages. It is not just the switch IC, but also the amplifier and layout that is important in that respect.  The max328 are also much higher on resistance and this makes matching more critical. Leakage is not really critical, especially not in the configuration of Mickle.
 

Offline jaromir

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Re: Multislope Design
« Reply #328 on: August 03, 2019, 09:40:45 pm »
jaromir Thanks for sharing, Big thumbs up :-+ :-+

I wonder if there is good explanation on how the ADC works? Also How to add ohm and current measurements into the design?

You are welcome.
Having functional ADC is first step to make complete multimeter, since both current and resistance can be "converted" to voltage output, being measured by voltmeter (ADC).
For current measurements you need current to voltage converter. It can be done as trivial as single resistor - from Ohms law you obtain linear relation between current and voltage. If you have 1Ohm sense resistor, 1V of voltage drop implies 1A of current. This is good fit and often used for higher currents - think of miliamperes to a few amps. For lower currents it is often useful to employ transimpedance amplifier, with benefit of nearly zero burden voltage.
Resistance can be measured by using constant current source to feed unknown resistance and measuring the voltage on it. Again, Ohms law dictates linear relationship between those. If you opt for 1mA of test current, 1V of voltage on tested resistor implies 1kOhm of resistance.

Theory may sound trivial, but as usual, devil is in details. Sense resistors and current sources need to be stable enough to fit expected precision bill. As usual, every digit on instrument mean exponential growth of component prices and technical hurdles that can be otherwise ignored on lower resolution meters, like thermoelectric voltages.
Another example is input buffer/amplifier for voltage measurement. This is project by itself. Looks innocent, but the need for switchable 10M (that is the simpler part) and 'very high' (usually higher than 1 or 10GOhm) input impedance while having decent noise and offset in +-20V input range makes the design choices complicated. Usual 'throw LTC2057 at it' approach gives horrible results. Problem leads to less common design topologies, such as bootstrapped supply amplifiers or discrete JFET autozero switches, both bringing fairly heavy baggage of other difficulties to solve.
 

Offline iMo

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Re: Multislope Design
« Reply #329 on: August 03, 2019, 09:54:09 pm »
Quote
Usual 'throw LTC2057 at it' approach gives horrible results.
People talk about LT1052 (bootstrapped) as the input amplifier (I think you too), and I wonder what is a better opapmp there - the LT1052 is 0.6fA/sqrt(Hz) input noise current, two external capacitors, and, afaik, 335Hz chopper freq.
The 1050 is 1.8fA/sqrt(Hz), no ext caps, and 2.5kHz chopper freq.
I would consider the 1050 even with the 3x higher noise, but higher chopping freq, which may interfere less with, say, up to 1000 measurements/sec..
 

Offline Rerouter

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Re: Multislope Design
« Reply #330 on: August 03, 2019, 11:04:23 pm »
For the bootstrap supply op amp at the input buffer, you mentioned it needed a high bandwidth, however C27 is limiting its corner frequency to only 67Hz? Is this intentional?

 

Offline jaromir

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Re: Multislope Design
« Reply #331 on: August 03, 2019, 11:28:54 pm »
AFAIK Kleinstein's ADC has 1PLC integration period, the same goes for my ADC, I'm not sure where 1000 measurements/second figure comes from.

LTC1052 does indeed good job with both current and voltage noise and is good candidate for bootstrapped input amplifier - at least that are my plans, I will see shortly how it works in reality.
LTC1050 is cheaper.
 

Offline Rerouter

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Re: Multislope Design
« Reply #332 on: August 03, 2019, 11:54:36 pm »
I wonder if he is talking about trading resolution for sample rate, e.g. 0.05PLC
 

Offline ali_asadzadeh

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Re: Multislope Design
« Reply #333 on: August 04, 2019, 05:45:32 am »
Quote
You are welcome.
Having functional ADC is first step to make complete multimeter, since both current and resistance can be "converted" to voltage output, being measured by voltmeter (ADC).
For current measurements you need current to voltage converter. It can be done as trivial as single resistor - from Ohms law you obtain linear relation between current and voltage. If you have 1Ohm sense resistor, 1V of voltage drop implies 1A of current. This is good fit and often used for higher currents - think of miliamperes to a few amps. For lower currents it is often useful to employ transimpedance amplifier, with benefit of nearly zero burden voltage.
Resistance can be measured by using constant current source to feed unknown resistance and measuring the voltage on it. Again, Ohms law dictates linear relationship between those. If you opt for 1mA of test current, 1V of voltage on tested resistor implies 1kOhm of resistance.

Theory may sound trivial, but as usual, devil is in details. Sense resistors and current sources need to be stable enough to fit expected precision bill. As usual, every digit on instrument mean exponential growth of component prices and technical hurdles that can be otherwise ignored on lower resolution meters, like thermoelectric voltages.
Another example is input buffer/amplifier for voltage measurement. This is project by itself. Looks innocent, but the need for switchable 10M (that is the simpler part) and 'very high' (usually higher than 1 or 10GOhm) input impedance while having decent noise and offset in +-20V input range makes the design choices complicated. Usual 'throw LTC2057 at it' approach gives horrible results. Problem leads to less common design topologies, such as bootstrapped supply amplifiers or discrete JFET autozero switches, both bringing fairly heavy baggage of other difficulties to solve.

Thanks for the feedback, I have other questions and suggestions too.

what about the AC voltage and current measurements? what's the sample rate of your ADC? can it be done for getting samples and calculating RMS based on the samples? is it fast enough? or do we have other options to measure AC precisely.
Also I have an Idea ;) can we put the whole ADC PCB and it's parts in a thermal chamber and hit them up, and regulate the temperature there? Say for example 65C degree I mean using cheaper parts for the Reference and precision resistors and op-amps, use normal parts but keep them at a certain temperature, something like a 3D printer bead as the heating element, and all of the PCB sealed in an isolated box, it could be much cheaper!
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Offline Rerouter

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Re: Multislope Design
« Reply #334 on: August 04, 2019, 06:22:22 am »
The 2 precision arrays are way cheaper than most of the stuff of this class, about $3 each for the really bog standard grade, $7 each for the almost perfect, and about $12 for the best you could conceivably need, as you only need to pay for stability not accuracy, Not to mention I have generic 0805 footprints on the back side of the board if you really want to keep it dirt cheap

Even the op amp footprints are standard, you could swap them out for some cheapies if you don't have as good supplier options. I've been trying to add test points and alternative footprints where possible to leave these options.

Heating everything up hurts quite a bit, all the resistances have thermal higher noise, the op amps generally have worse specs in general and increased noise of there own, its generally better to just pack it into a good insulating box with some desiccant to keep the humidity stable as well, (If you look at the datasheet almost everything is trimmed in to perform best at 25C)

Equally the op amps are way cheaper than I had imagined, I'll have to check my BOM, but I suspect the whole board so far falls under $100 including PCB.

The other issue, and what I am trying to work around by layout is making sure every part of the board is the same temperature is literally impossible, but you can minimize how much variance is seen by components and connections. and try to ensure that differential signals (say both op amp inputs) see the same temperature / same line on a thermal gradient map as possible. every connection between dissimilar metals is technically both a voltage and current source depending on what hurts you more.

E.g. the parts of the circuit I went through and worked out the power dissipation for, normal engineering brain would say a change of 25mW is literally nothing, but it causes a peak on the thermal gradient map (something I really wish I knew how to model) and have a slope leading away from that part,

25mW in a SOT-23 package is an 6C rise because the package is 250C/W to pcb, which while not a crazy steep gradient does effect what surrounds it, or on the more exterme, U4, he is dumping out 300mW just sitting on the PCB, but he has a very low noise figure, so its more a case of working out how that heat will effect the things around him, the reference is easy to hide on its own little thermal island, the op amp, not so much.
« Last Edit: August 04, 2019, 06:41:21 am by Rerouter »
 

Online Kleinstein

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Re: Multislope Design
« Reply #335 on: August 04, 2019, 08:05:01 am »
The upper OP in the 2 OP buffer amplifier is mainly working as a follower, and as this it is fast. The capacitor in direct feedback will not see much voltage change even on a large voltage step. So the important initial settling is fast. The capacitor may slow things down when it comes to the last few 0.01% settling, but for the precision part there is the 2 nd  OP (OPA145). The 100 nF capacitor does not need to be that large some 1 nF would also work and chances are it works without the cap.

So far my ADC runs with 1 PLC integration and for tests also 2 , 4, 8 , 16 PLC are possible, though not very useful for real life.
I initially did a few test with very short integration of some 100 µs (still with just an integration phase like in a dual slope), and even this worked quite well. However sending out the data was limiting than. Even now I get some UART errors at higher baud rates though the opto-coupler should be fast enough. Something like an 1 ms integration time is a plausible short time, some 100 µs is probably the lower useful limit as even with some speed ups the run-down will take about that long and sending the data also takes some time.  The noise from R12, the 5534 and so on would be relevant for those faster conversions, but not at 20 ms.

There is no real need to get a constant temperature for the whole board. Using good resistor arrays is easier and the resistors need to good anyway for good linearity and gain stability. Measuring the ADC gain for every signal conversion (e.g. cycle with signal , zero and reference instead of just signal and zero) is a working option if lower grade resistors are used. The LM399 reference brings it's own oven and there are not that many alternatives for a cheap long time stable reference. The LM399 is also easy to use.
The ADC principle also works with cheaper parts - my first test used TL072 and normal 1% thick film resistors. For lower demands a single OP integrator should be OK and the buffer can also be a single OP. There are surprisingly few really critical parts where high quality parts help: the reference,  1 OP in the integrator, to a lesser degree the buffer OP,  the 3 resistors at the integrator input and 3(4) resistors for the reference amplification.

The input amplifier / buffer is a difficult part. For just a buffer a bootstrapped AZ OP is a good solution. The choice of AZ OP is a compromise between input bias, current noise on one side and voltage noise on the other side. In any case it needs some filtering at the input to avoid higher frequencies to cause trouble going both directions: RF interference from the outside and the switching / chopping spikes from the AZ OP.  Just as a buffer I would consider MAX4238 or AD8551 good enough. In a configuration with gain the LTC1052 or AD8628 may be more suitable as they have less noise.  For just a buffer, there is no need for the low voltage noise of the LTC2057 - with gain the low noise level may be needed to make full use of the ADC resolution. The LTC2057 is not suitable for really high impedance sources though, but should still be not that bad with some input filtering. The high input impedance of good DMMs is not there to make them useful with Mohms source impedance, but more to get full precision even with sources in the 10 Kohms range. For low noise just a 100K range series resistor for input protection is no longer an option. For really high impedance sources there are separate electrometers.

A JFET amplifier with AZ switching at the input is also not a simple solution. The really hard point here is getting the switching spikes from the AZ switching small. The possibly large voltage step makes this in my view more demanding than switching on a chopper amplifier, with voltages of a few mV at the switches.
 

Offline Rerouter

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Re: Multislope Design
« Reply #336 on: August 05, 2019, 08:48:12 am »
The micro area is mostly done, and have fleshed out most of the power supply routing, the micro will end up nudged a bit to the left, and the reference likely rotated clockwise 90 degrees depending on how I have to handle room for the input buffer idea.the 7V buffer is included, and have already planned out room for the power supply regulators bottom left and the diodes / input caps bottom right.

Any thoughts on even a general layout for what your planning for the input buffer, or would it be nor far off a mirror of what we have after the input mux?
 

Offline namster

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Re: Multislope Design
« Reply #337 on: August 05, 2019, 03:05:13 pm »
i am very interested in releasing a multi slope ADC , but i wanna know the advantage of this kind of ADC instead of using a Delta Sigma converter ?
 

Online Kleinstein

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Re: Multislope Design
« Reply #338 on: August 05, 2019, 05:22:39 pm »
The general placement looks acceptable. The control lines the the MUX are not that critical (they are switched only a few times) and I see not need for surrounding them with ground.

For the input butter a circuit quite similar to the buffer behind the MUX is possible. The main difference would be using an AZ OP instead of the OPA145. The normal buffer could also drive some bootstrapping for input protection.
An alternative version would be similar to the buffer Mickle has in his circuit, with bootstrapping the supply from the OPs output. This is slower, but not a problem for the input.


@namster:
Sigma delta ADC converters as a chip (e.g. LTC2410) have a lower voltage range, like +-2.5 V for the input and 5 V for the reference. This makes is rather difficult to find a really long time stable reference. The INL of the chips is also limited to some 5 ppm. The low noise chips tend to be not the lowest INL ones. One the positive side they are relatively easy to use, cheap and low power. If the performance is sufficient they are an easy way to something like 5 digits or low end 6 digits resolution.

Building a high resolution sigma delta ADC from separate parts is quite difficult, as the switching and integrator has to be quite fast to get high resolution like 24 Bits. The SD ADC has it's own difficulties, like idle tones and more critical switches. Existing implementations like in the Keysight 34465 are quite complicated. They have advantages for high speed, e.g. to do digital RMS.
Due to the high speed control it usually takes an FPGA for control and a more critical layout.

For the multi-slope ADC principle one can get away with slower switching and still get high resolution. Difficulties are more in the way combining the contributions. Also the speed of the conversions is limited as the run-down takes some time and thus limits the speed.
The multi-slope implementation I showed uses rather simple hardware (my first version was even on a bread-board + small PCB for the µC) and still gets high resolution and low noise. It is not a classical MS-ADC but also uses the auxiliary ADC. The more classic solutions tend to need more hardware and still get higher noise.
 

Offline branadic

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Re: Multislope Design
« Reply #339 on: August 05, 2019, 05:29:19 pm »
Just my opinion: It kinda looks odd to use a THT package for the microcontroller, while almost everything else is SMD.
Don't forget to place some mounting holes.

-branadic-
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Offline Rerouter

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Re: Multislope Design
« Reply #340 on: August 05, 2019, 09:05:10 pm »
well technically have the digital signals, ground and digital supply voltages all bunched up as much as possible when even close to the sensitive areas to try and reduce any risk of coupling. It may be overkill, but the board area is free to use.

Branadic, This more falls under not having fully broken down his original assembly programming into psudocode (I am not good with reading assembly), the dip package being as large as it is, means it would be easy to swap out to a QFP or other micro of your choice. there is nothing particularly special about the ATmega8 used in this circuit. you could even plop in an atmega328 if you have an old arduino board floating around. it was more keep the code the same until I know how to adapt it.

Mounting holes can be done, means I will need to shuffle the power supply area and input connector a little, to fit M3 holes with 5.5mm diameter exclusions at the corners,  a 100x100mm board is quite firm, and luckily most of the more sensitive stuff lives towards the middle, so the board stress and heatsinking from the mounting posts should be OK, just wondering how they should be in relation to the circuit, I imagine tied to ground at the bottom corners near the power supply and left floating up the top
« Last Edit: August 05, 2019, 10:02:18 pm by Rerouter »
 

Offline David Hess

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Re: Multislope Design
« Reply #341 on: August 06, 2019, 06:32:31 am »
Just my opinion: It kinda looks odd to use a THT package for the microcontroller, while almost everything else is SMD.

It used to be more common and it is sometimes still done so that the microcontroller can be easily programmed before assembly.
 

Online Kleinstein

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Re: Multislope Design
« Reply #342 on: August 06, 2019, 07:46:31 am »
A THT µC looks odd, but the space it there and allows swapping the µC if really needed.
The other point is that the SMD packages for the AVR are rather tiny - so it's either rather large or rather dense compared to the rest.
The current code for the ADC uses some 1700 bytes of flash and little RAM, so even the mega48 is large enough.

I know reading other peoples ASM code is difficult.

For the mounting holes it would be good to have grounding at one hole. For the others I would prefer the option to keep them isolated.
 

Offline Rerouter

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Re: Multislope Design
« Reply #343 on: August 06, 2019, 08:16:56 am »
at ATmega's actually come in a 0.8mm pitch TQFP package, so its still in the easy to solder area, Once I get this board locked in for version 1, I can do a quick spin for a TQFP option, but in reality any micro with a comparator and ADC could likely be substituted. I'll likely end up using the TQFP, as I have a tray of 328's still floating around,

I actually prefer smd micro controllers with a 6 pin ISP connector sitting next to them, there is always another software revision, so may as well make it easy to update,

Ground 1 hole, done, will do it in the power supply star area so any shorts are where the traces are thick, and its easy to repair.

 

Online Kleinstein

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Re: Multislope Design
« Reply #344 on: August 06, 2019, 10:29:32 am »
..., but in reality any micro with a comparator and ADC could likely be substituted.
I am not so sure with this. Some other µCs may need extra external synchronization to keep jitter low, especially if a PLL clock is used, but also just the internal structure of the IO ports may cause more jitter. There are usually not specs for this, so one has to check. At least some other ADC designs (e.g. 34401,  some versions at CERN) use extra synchronization. Another point is the ability to get a defined timing - this may need extra HW support (e.g. use timers) if the µC is using caches.
 

Offline iMo

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Re: Multislope Design
« Reply #345 on: August 06, 2019, 12:48:26 pm »
well technically have the digital signals, ground and digital supply voltages all bunched up as much as possible when even close to the sensitive areas to try and reduce any risk of coupling. It may be overkill, but the board area is free to use...

Mounting holes can be done, means I will need to shuffle the power supply area and input connector a little, to fit M3 holes with 5.5mm diameter exclusions at the corners,  a 100x100mm board is quite firm, and luckily most of the more sensitive stuff lives towards the middle, so the board stress and heatsinking from the mounting posts should be OK, just wondering how they should be in relation to the circuit, I imagine tied to ground at the bottom corners near the power supply and left floating up the top
Put a 27-51ohm resistors in each digital (and analog) signal (as close as possible to the AVR package).
You may provide slots around the mounting holes such you lower stress and heat sinking.
PS: I still think putting the voltage regulators on the inguard ADC board is not a good idea..
« Last Edit: August 06, 2019, 12:52:13 pm by imo »
 

Offline Rerouter

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Re: Multislope Design
« Reply #346 on: August 06, 2019, 01:33:43 pm »
doesn't make any sense for the analog lines, as they are inputs, and there sources have resistances of a few kilo-ohm, the digital outputs already have footprints for series resistors, I just ball parked 220 ohm to knock things down to under about 1MHz but it can be reduced further,

Also thinking the power supply would be better on its own PCB leaving just the bulk decoupling locally, but then you raise the dangerous question, what to do with all that extra room  ::)
In reality the math is saying it should be fine unless your asking the regs to drop a lot of voltage, the 5V rail has under 15mA of load, and the +-15V rail has less than 40mA, so being tucked away in its own little corner with only the micro to upset means the reference and the hot slope amplifier in the ADC will locally out compete any power supply gradient by a mile.
 

Offline namster

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Re: Multislope Design
« Reply #347 on: August 06, 2019, 01:54:10 pm »
@Kleinstein
thanks for these clarification , for my final years project i release a prototype of Milliohmeter but the ADC is the main problem in my country its very difficulte to find an adequat adc , i realsed a dual slope ADC but the result wasn't very convincing i will start a prototyping a new multislope ADC based on the shematics you proposed .
 

Online Kleinstein

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Re: Multislope Design
« Reply #348 on: August 06, 2019, 02:10:11 pm »
If the possibly high current of the NE5534 is a problem, it would be Ok to use something like OPA197. The Ne 5534 is more like the classic choice on many other designs, as its fast and cheap.

@namster:
for a lower cost, easier version, one could use simpler OPs, a single OP buffer and single OP integrator. The asymmetric reference part is not absolutely needed - especially not for less than 7 digits. For the switches 74HC4053 or HEF4053 are also not that much higher noise.
 

Offline iMo

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Re: Multislope Design
« Reply #349 on: August 06, 2019, 05:35:04 pm »
Just my opinion: It kinda looks odd to use a THT package for the microcontroller, while almost everything else is SMD.

It used to be more common and it is sometimes still done so that the microcontroller can be easily programmed before assembly.

The DIL28 socket may serve as "a connector" for future FPGA based solution (a piggybacked board) :)

PS: also I would recommend an external 16MHz oscillator (instead of the AVR+Xtal).
« Last Edit: August 06, 2019, 05:51:27 pm by imo »
 


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