The half bridge is a swine, because of the problem of current mode where it goes unbalanced.
Any voltage mode converter is a PITA because if you add load capacitance, it can go well unstable.
The pushpull is a pain because vdrain goes up to 2xvin when the opposite fet turns on, and so youre snubbering will often dissipate a lot due to the high voltage it sees. (unless a complex snubber is done)
SMPS with sync rects is also challenging when there is much secondary side leakage L to ring with the sync FET cds.
Any 400V approx input SMPS which uses bootstrapping (gate drive) is a pain as they require beautiful layout, which often cant be achieved due to winding tracks around big heatsinks etc.