If your 40M voltage dividers don't work then you might try something like the following. It is based on the JFET source follower in the Art of Electronics book (figure 3.29.) By using a FET gate for the input stage the input current will be on the order of 10 nA.
The problem with the Art of Electronics circuit for you is that 1) high voltage JFETs are hard to find, and, 2) you can't put a voltage divider directly on the output without affecting accuracy.
This circuit uses depletion mode FETs rather than JFETs so that higher voltages can be supported. It uses a third FET which you can place a voltage divider on with a more sensible impedance (470k in the simulation) than your 40M. If precision isn't important then the third FET can be replaced with a BJT. (The value of R1 would need to be changed.)
Note that your attenuator could 'fix-up' some of the output error with resistors of suitable value.
The FETs used for the simulation were BSS229s but you should be able to use pretty much any so long as they support the system voltage. The closer the FETs match, the better, obviously.
The simulation shows that you should be able to get pretty accurate results. I wouldn't expect +/- 0.2% like the simulation shows but +/- 2% should be easy to achieve. Assuming, that is, that I haven't missed something. I have only simulated the circuit. I haven't actually built it.