Reversed PFET between USB and 5V rail - How does it work?

[Starlord]

So I've got this in a circuit I'm making some modifications to.  It resembles a method of reverse polarity protection I'm familiar with, but I'm having a hell of a time wrapping my head around what's going on inside the PFET.

I would assume this disconnects the 5V rail from the USB when 5V is present.  But that doesn't make sense. 

First, because why disconnect the 5V from the USB if 5V is present on the rail, unless perhaps it might be slightly lower than 5V and cause power to flow back into the PC? 

And second, because if 5V is present on the USB, wouldn't it make the PFET turn off as soon as it turns on, since the source and gate would be approximately equal instead of the source being much less than the gate?

Maybe that's how this works?  The PEFT just goes into a state where it balances between on and off?  But wouldn't that put it in a high resistance state?

What's going on here?


 

[Kjelt]

If +5V is not present the USB 5V will pass through the freewheelingdiode/bodydiode of the fet and power the +5V.
When the 74LVC1G output is 1V less than +5V so less than 4V the FET will conduct to its Rds on of 70mOhms. So what is the input of the 74LVC1G ?
Probably it is a protection for the USB port, so when +5V is present but USB is 0V it will not set the FET to conduct and the diode blocks the +5 going into the USB something like that.
If the USB is an output only than it makes sense the fet just blocks the 5V to the USB till the output of the gate is set low. So it is simply a USB powerswitch in that case.

[Starlord]

I think I understand maybe.

That input to the 74LC is USB_HOST_ENABLE

So I think what's going on here is:
1. When 5V is coming in through the USB, it can pass through the PFET body diode regardless of whether it's on or off.
2. When the device is a host, the PFET gate is pulled down, turning it on.  This opens the path for the 5V rail to be connected to the USB to power external devices.
3. When the device is a slave, the PFET gate is pulled up, turning it off.  As stated above, even when he FET is off, it still conducts through the diode, so the USB can supply 5V to the system, if available.
4. And I guess the resistor there pulls the gate up to turn the FET off until such time as the microcontroller is able to assert the host pin high or low to set the PFET into a known state.
 

[Mr Smiley]

http://provideyourown.com/2012/reverse-polarity-protection-circuits/

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