Not a simple or one device-design fits most topic. To achieve the lowest noise performance requires a LOT more than just circuit design, low noise devices, construction techniques, low noise power supply and ....
The design criteria must be very well defined for the device or item being measured and what the expected signal needs to be for the rest of the measurement system.
"Cook book" or off the shelf IC solutions often never achieve the lowest noise, highest signal fidelity and best overall performance. The best low noise designs are optimized for a specific application.
Bipolar transistors can be low noise depending on what the signal input might be. The do have a problem of noise current dependent on collector current. Data books once published noise contour maps to help designers optimize a particular device to a specific circuit and system.
JFETS don't really have this problem except the larger the JFET's gate area which results in lower device resistance and lower noise caused high input capacitance. One example of a large gate area JFET would be the Interfet process NJ3600 spec'ed at 0.35nV/root-Hz at 30Hz. The 30Hz spec is significant as low noise is difficult to achieve at low frequencies. Design trade off cost for this device, input capacitance of ~600pF at VDS =10V.
Other low noise JFETS are ones made by Moxtek
http://moxtek.com/wp-content/uploads/pdfs/n-channel-ultra-low-noise-jfets/X-RayJFETs.pdfThese offer low noise and low input capacitance when operated at -100 degrees C.
The Physics folks tend to use germanium JFETS cooled to -xyz degrees C to achieve low noise for target arrays.
http://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/20000031730.pdfMicrowave folks often use GaAs FETs and numerous other FETs to achieve low noise. LNA's also appear as parametric amplifiers, to Masers.
Single ended input devices are 3db lower noise than a diff pair front end, except the single ended input is more difficult to manage than using a diff pair.
Going beyond low noise devices, there is an entire world of grounding, shielding, field management and powering to allow optimum low noise performance. Suggested reading: Grounding and shielding techniques by Ralph Morrison. First editions of this book were focused more on noise, grounding and related, later editions omitted some of what was covered in the first editions but added sections on digital related problems.
Trying to get an extremely low noise front end to live with digital back end is always difficult. More often than not, the digital section is located else where from the input section and put to sleep as the digital switching noise tends to get back into the inout section causing added noise and other problems.
There are a host of power supply related, system related problems that hinder low noise and signal fidelity performance with any added digital processing or control system seriously compounding this problem.
This is a rather complex question with a lot of different and complex answers.
Bernice