Lars DIY GPSDO with Arduino and 1ns resolution TIC

[Miti]

Metrologist,

A gain of <20 may be too low to have a decent control, you jump too much up/down per every bit of DAC. Even my gain of 122 I consider too low, one should aim toward 500 at least, as recommended by Lars, or even 1000. Too high though and you may not be able to control long time drift so I'm guessing, depending on the OCXO, up to 1000 you should be ok. I think is preferable to use an op-amp to adjust the gain and offset rather than resistors.
And here comes the question for Lars.
I know that you recommend resistors/trimmer pots to adjust the gain and the offset based on individual OCXO needs but doesn't that change the RC constant of the filter? In my case I had to add two 50K from VC pin of the OCXO to ground just to bring the DAC towards the middle of the scale. Adding more resistors to reduce the range/increase the gain would lower even more the impedance seen by the DAC. How would that affect the loop?

[iMo]

The R3,4,5 and C2,3 low-pass filter the two PWM digi outputs - thus creating the "16bit DAC" (by changing the PWM duty).
Loading them with R lowers the DAC max output voltage accordingly. It should have had no impact on the PI control loop timing..
I would add an single supply rail-rail opamp - you may amplify (EDIT: or divide in your case - for example from 0-5V DAC's output to 0-500mV , and add an X Volts offset such your OCXO's tuning range will be from X to X+500mV) and offset the DAC values easily then. It may add some noise and drift when not designed with care.

[metrologist]

Yes, Miti. I was surprised that the diff_ns range was so large (note that now I posted the CTI spec and if my thinking is correct, then the voltage control range of 1000 to 2000 ppb yields gain of 32 to 65).

Also, there is a lot of drift when set to hold mode and it can vary in both directions. Setting damping too high and it will overcome one cycle. I'll look at the gain value again and measure the time difference directly. I'm going to try and optimize two circuits with two different OCXO's.


I found the CTI specs.

Product type: OSC5A2B02-10MHz
Nominal Frequency: 10.000MHz
Supply Voltage: +5V
Supply Current: Starting: ??600mA. Stability: ??250mA/+25Deg
Frequency Tolerance: 200PPb/ Vc=+2.0V(+25Deg)
Frequency stability vs. Temperature: 10PPb
Operating Temperature Range: 0Deg--+75Deg
Load Stability: 2PPb

Power Supply Stability: 2PPb
Aging: (after 30 days' power on) 0.5ppb/day
0.1ppm/first year
0.4ppm/10years
Short-term Frequency Stability: 0.05ppb/second (Allan Variance)
Warm-up Time: 100PPb/ Vc=+2.0V(+25Deg)
Voltage Control Characteristics:
Voltage Control Range: 1 ~2 ppm
Control Voltage: 2.0V

Slope: Positive
Linearity: 10%
Input Impedance: 100K??
Modulation Bandwidth: 10 KHz
Output Waveform: HCMOS Square Wave
Output Voltage:
VOH 4.5V min.
VOL 0.5V max.

Duty Cycle: 45/55 %
Rise/Fall Time: 6nS
Load: 15pF
Phase Noise: -80dBc/1Hz, -120dBc/10Hz, -140dBc/100Hz, - 145dBc/1KHz, -150dBc/10KHz
Operable Temperature Range: -40Deg~+85Deg
Storage Temperature Range: -55Deg~+105Deg
Package: 25.4mmX25.4mmX12.5mm(tin package)


The other I have are Milliren:

Output Frequency: 10.000MHz
Thermal Stability: ±1.0E-08
Temperature Range: -54°C to +85°C
Frequency Tolerance: ±1.0E-07 @ +25°C
Daily Aging: 1.0E-09/day after 24 Hours Continuous Operation
Mechanical Tuning: ±1.2E-06
Warm Up: 1.0E-08 after 3 Minutes referenced to 30 Minutes @ -40°C
Oven Supply Voltage and Power: 20VDC +/-5%; 7.5W Warm-up, 1.8W continuous at -40°C
Oscillator Supply Voltage and Power: 10 to 16VDC; 0.2W Max.
Output Power: +1dBm ±2dB
Short Term Stability: 5.0E-12 at 1 Second

[iMo]

Guys, in order to entertain you a little bit during your hard work - here is an idea how to adjust gain and offset such it fits an OCXO's tuning range best.. 

The schematics:
1. at the input there is a resistive Divider (ie. it divides 1-5V DAC output to 100-500mV),
2. then an Adder (adds an Offset, ie. 6V for your OCXO) and
3. a "minus one" Multiplier (as the Adder does -1*(DAC+Offset) )
4. and finally the output goes to the OCXO's EFC input (the 100k there is the internal impedance of the OCXO).

With given values a DAC output of 1-5V divides to 100mV-500mV, adds approx 6V Offset (set via the pot trimmer) and the OCXO's EFC is then 100-500mV range around those 6V.

It needs a negative supply rail - that is pretty annoying.. 

The below five colors are outputs for 1,2,3,4,5V input from the DAC.
You have to add a decoupling, use some better opamps (noise, offset, tempco), use stable and clean power supply.
Provided as-is, use at your own risk..

[metrologist]

Metrologist,

A gain of <20 may be too low to have a decent control, you jump too much up/down per every bit of DAC.

I thought it was the other way around, as a linear multiplier (or divisor). For example, higher end XO move less with proportional voltage change - if I understand, my Milliren moves only ±12Hz on the full 0 to 10V tune range. The CTI specs seem to say 20Hz over 5V range - but it looks like it moves a lot more and I need to measure it.

Guys, in order to entertain you a little bit during your hard work - here is an idea how to adjust gain and offset such it fits an OCXO's tuning range best.. 

Oooh, that's fancy! Thanks!!! I was going to try a passive circuit. Am I right to think we do this to increase DAC resolution?

[Miti]

Metrologist,

A gain of <20 may be too low to have a decent control, you jump too much up/down per every bit of DAC.

I thought it was the other way around, as a linear multiplier (or divisor). For example, higher end XO move less with proportional voltage change - if I understand, my Milliren moves only ±12Hz on the full 0 to 10V tune range. The CTI specs seem to say 20Hz over 5V range - but it looks like it moves a lot more and I need to measure it.

On page 10 "gain = 65536 / VCO range (in ppb)". That means that your gain is too low because the VCO range is too big. Lars recommends restricting the range to 130 ppb using a "good" OCXO for a gain of 500, I don't know if this is only something that he chose empirically or he did some experiments with even lower range/higher gain. I'm talking OCXO only here because next he mentions Rubidium having a range of 1 ppb with the corresponding gain of 65536.
The PWM DAC that Lars implemented has a range of 5V. The CTI that moves 20Hz (I assume +/- 10HZ at 10MHz) over 5V has a huge range of 2ppm while the Milliren's range is 600ppb over 5V.
The jump per bit in the case of CTI would be 30.5ppt while for Milliren is only 9.2ppt. Lars's 130ppb recommended would jump about 2ppt and Rubidium would jump a whooping 0.015ppt (15ppq).
The reason why we want to use the resistors or the fancy circuit is to compress and offset the range of the DAC thus decreasing the 1LSB from 5V/65535 to a much lower value. The DAC resolution is defined as the number of bits and that stays at 16, it doesn't change. I've attached a diagram that shows the control voltage (thick black line) that my OCXO needs to keep the output frequency at 10MHz from power up to about 6 - 7 min when the warm-up period ends. You would expect to be a straight line after that but it isn't. In long term it seems to drift down very slowly meaning that the frequency tends to go up. The danger is that if you compress the range too much, after few years you may be out of the control range of the OCXO.
I hope it makes sense.

[metrologist]

Thanks, Miti.

I was taking CTI 2ppm as 2000ppb, so the gain calculates to 32. I cannot maintain lock much over a TC of 8 with that low gain. The worst case should be g=65 if 1000ppb. I still need to measure the actual tuning range and that will be first thing I do next.

In honor of the hallowed ween, I have some scary images to post.

I set the gain to 200 and TC=12, shown in the first scope shot below. The phase oscillates within the 10s persistence, just under the TC, and keeps lock. The magenta trace is the tune voltage and it does not move much. If I increase gain, the phase change is faster and overcomes the TC and I loose lock (not shown).

I lower the gain to 100 and the phase change is slower and the tuning voltage is faster, shown in scope shot 2.

Lowering the gain to 32 I see scope shot 3. I cannot quite explain these results.

I have set my gain to 100 again and TC to 16 and was maintaining lock, so I started an MDEV analysis which had collected about 4 hours of data when I left it running. The "inflection" point Lars discusses was happening around 80 sec.

[metrologist]

imo, what do you think of this circuit? I suspect it will be heavily influenced by the osc tune circuit, so perhaps a series resistor to the tune pin?

[iMo]

Guys, in order to entertain you a little bit during your hard work - here is an idea how to adjust gain and offset such it fits an OCXO's tuning range best.. 

Oooh, that's fancy! Thanks!!! I was going to try a passive circuit. Am I right to think we do this to increase DAC resolution?

Yes, you may transform the 0-5V DAC range (ie the Lars design) to, say, 0-500mV (still 16bit resolution) and position this new DAC range around your OCXO EFC voltage of interest -> the voltage which fits 10.000MHz (with the Offset trimpot). You may power the Offset trimpot (the 10k trimpot in my schematics) from the OCXO's Vref output (to make it stable), for example.

Example: my OCXO has got the EFC tuning range from 1-6V, where my current exact 10MHz is at 4.2344V. I may go with the 500mV DAC range (Lars' 0-5V compressed to 0-500mV, and still 16bit resolution) and I will set the DC offset close to 4.00V.

Therefore the Lars' 16bit DAC will tune from 4.00 to 4.50V with full 16bit resolution. And my current exact 10MHz is in the middle of that range.
With aging it will walk somewhere, you have to judge how far it will walk and whether the 500mV range creates enough headroom for such a walk.

[lars]

Some general comments about "gain". If you measure gain by using h1 and h65535 (min and max from DAC) and the formula you should be enough close for correct gain. If the gain is close say up to a factor of two it should still work. You could get more or less ringing when the DAC voltage should tune in but it should work still. If you look at the P-term it is proportional to gain but the I-term is proportional to the square. So if the gain is wrong it will affect both the time constant and damping of the loop but are not super critical.

The reason I choose 130ppb range and 2ppt (0.002ppb) DAC resolution is a compromise between ability to handle long term drift and quantization noise with only 16bits.

If we start with the 2ppt DAC resolution it affects the best possible ADEV you can get. With 2ppt (2E-12) you can get below 1E-12 in ADEV so a really good OCXO is needed. On page 18 figure 8 in my instruction I have by purpose selected a larger range so the minimum step is 1E-11 and still the OCXO131 gives 5E-12 in ADEV. I will come back to Metrologist's result later that seems strange.

For the total range of 130ppb I have used different ranges even if 130ppb seems ok for me even due to drift. I have had OCXO monitored for more than 10 years but not drifting above 100ppb. Often the first year are worse than the next 10. In many OCXO's with SC-cut xtals including the one Metrologist is using the 10 year drift are specified to 400ppb.

So with a 16 bit DAC it is a compromise between enough resolution to use the best ADEV compared to long term drift of the OCXO.

To change the gain Imo's tips are very good to add an op-amp as it gives a lot of flexibility. But I should should say I have only used trimpots and resistors. Most of the time my OCXO have had a Vref. But if not I have added a Vref IC of 5v or a MC7805 that have been enough stable.

As the PWM-DAC can be seen as a perfect 0-5V DAC with low output impedance followed by the filter with a DC output impedance of 78kohm (39+39k) any impedance to ground or Vref will shunt the output voltage. For example a 10kohm poentiometer in the middle position will be two 5kohm resistors in parallell making the parallel combination 2.5k. So with a 78kohm in series and 2.5kohm shunted the range will be about (78+2.5)/2.5 is about 32 times lower range. With a 50kohm pot it will be about 8 times lower range (higher gain). I have used 10-50kohm and some different resistors in series with the pot to get what I want. The pots have mostly been 20-25 turn small trimpots like Bourns 3296, Spectrol 64W or noname from eBay.

If we add a trimpot or other shunt element the last stage in the RC filter will be affected, but it is not so critical. Another possibility is to add some more series resistance after the last RC before the shunting trimpot (resistor). The two 4.7uF are selected to suppress the 488Hz PWM signal from the Arduino. So we want to have less than 1LSB of ripple after the RC filters. This are ok with 4.7uF but also close with say 2.2uF. I have also used 10uF. The time constant in the RC filters are still in the seconds region and don't gives a lot of phase shift compared to the time constants in the PI-loop and software low-pass filter.

One thing with the 4.7uF is that I recommend tantalum 35v as leakage may be a problem. I wouldn't recommend electrolytic. Film will probably be ok. I have a couple of new ceramic 4.7uf SMD that I have intended to test but not yet done. So far I have only used different brands of tantalum 25 or 35V with good results.

Lars

[lars]

Hello Metrologist,

If I compare Miti's and your MDEV curves it is something fishy with yours. Miti's ends at about 1E-11 but yours at 1E-9 so a factor of 100 higher. As your OCXO is specified at 0.05ppb (5E-11) short term noise (ADEV) I would suggest that your curve at least should be below 1E-10 but probably 1E-11 also if ok.

With 1E-9 the result are as poor as a medium qulity TCXO and a TC above 10s is difficult to get for such a TCXO as it is so much frequncy ripple so the loop will go above 100ns that is the condition for locked. On page 18 figure 8 you can see a really good TCXO DOT050V from Digikey that gives ADEV's of 1E-10 but still don't use longer than TC=50s to get optimum results.

I can see some reasons:
- Fault in OCXO even if my experience says no even if it is used OCXO from eBay.
- The 5v supply and decoupling
- The 4.7uF electrolytic
- Noise due to grounds and the prototyping

Suggestions:
-Use different 5v to Arduino and OCXO and maybe add more decoupling on them (and close especially on the OCXO).
-Change the 5uF electrolytics to tantalum. Even 10uF or 2.2uF would be better if you have them in tantalum.
-Add a 20-100kohm trimpot (or two resistors) between +5v and 0v to the input of the OCXO to test if it gives a different result. You have to find out a new gain.

Another comment about the oscillocsope pictures. I really like oscilloscope pictures but in the this case the 10Mhz jitter will still be were even with a working loop if you check over some time due to the 1PPS (GPS noise). In this case with wrong gain and oscillations it is more reasonable to see it on the serial monitor and the DAC value going corrupt. What is reasonable is difficult to say. At short TC's the ripple of the DAC is higher but should be more just noise due to the 1PPS than something that oscillates up and down.

Lars

[lars]

I have a question for you all. I was surprised a few months ago to read that some of the non-professional grade GPSDOs still being sold for a lot of money on ebay basically are just a disciplined 10 Mhz source and GPS but the 1PPS is not disciplined any further by the OCXO GPS combination (to improve its jitter). They wire the internal GPS 1PPS directly to their 1PPS output and it is not smoothed out.

I suppose that to properly derive the 1PPS from the disciplined oscillator basically what would be required is a PIC chip that divides by 10 million (I think one of the the "PicDiv" preprogrammed PIC chips can do this) and then delivers a short pulse each time the positive going pulse occurs, with the setting for cable length on the input side fine tuned until the pulse matches the center of the stairstepping range (presumably the truest point along the 25 nanosecond second change range)

Its been a long day for me and I'm sleepy.. Is this right?

Hello cdev,

Even if i am no expert I would say you are correct in your conclusions. I guess that the "professional" GPSDO's often have been used in telecom applications that requires good absolute timing compared to the "non-professional" like BG7TBL that more seems to be 10MHz frequency references. My intent with my GPSDO have also been a 10MHz reference. Of course the timing requirement is of importance. If +-11ns extra jitter is OK you an use the output from a uBlox series 6, 7 or 8 direct. We have to remember that the GPS in itself have many nanoseconds of variations over both a day and even in the minute range (for example due to satellite shifts). here I really recommend to see the NIST data archieves with data taken every 600 seconds to see the limits even under good conditions.

I have thought of how to add a jitter free 1PPS to my GPSDO. The simplest (that I use) is to add a PICDIV. This will not syncronize the GPS 1PPS but give a jitter free PPS. It is many PICDIV versions that can give 1PPS and also be syncronized. See Tom van Baaks PICDIV pages. You can buy them for just a few dollars and also Tom gives you the code so you can program the 12F675 by yourself. As the PICDIV #26 also give gives a chance to set another division factor I like it for testing of the TIC in my GPSDO.

If I were to make the best 1PPS I probably would add an extra uP (Arduino) to handle what i think is most important: Robustness. I think that having software to check that the 1PPS out really are aligned well with the GPS receivers jittery PPS are very important. How often should you check and what is a wrong PPS so it is time to align again? You have two edges of the 48MHz that makes the PPS possible to be +11ns or -11ns. Which are correct? So absolutely not impossible to handle but needs some care to get right.

Also the 10MHz gives 100ns between the positive (or negative edges) and need to be aligned either by the Arduino e.g TIC_offset and/or e.g. the cable delay in the GPS receiver.

Lars

[Miti]

imo,

I think we were simulating "for fun" in the same time. My version only needs 5V and any cheap rail to rail will do it.
The plots are before and after the 78K (to simulate the output of the DAC) and the outputs of the op amps.
R4 should be a trim pot to adjust gain and R1/R2 another trim pot for offset.
But as Lars said, a trim pot may be enough.   

[iMo]

Yea, making simulation is fun.. There are some limits, however

Opamps - with above schematics the 1LSB will be around 8uV (!). You would need a pretty good opamps for that - with input drift tempcos below 8uV/degC, for example. Also mind all possible noise sources start to interfere into your business.. On the other hand the DAC resolution with the above schematics will be 1-2ppt (with a 200ppb/Volt OCXO). So the question is whether the stuff with those opamps will not be over-engineered  a bit

The PWM filtering - I would use a combination of tantalum and ceramics. The new ceramic multilayer capacitors (ie 10-22uF) have got an issue - their capacity drops down with applied DC bias - ie a 10uF/6V ceramic may drop to 2uF at 6V.

The PWM includes a lot of high freq content (ie the edges) thus ceramics in parallel with the tantalum one may help. Also mind the PWM made by atmel328 will always copy its 5V Vcc noise and stability..

[iMo]

Another idea - to decouple the PWM DAC from the noisy MCU or FPGA. You may use a single 5 pin smd gate, the gate gets its own 5V quality voltage regulator and good decoupling.

[Miti]

Yea, making simulation is fun.. There are some limits, however

Opamps - with above schematics the 1LSB will be around 8uV (!). You would need a pretty good opamps for that - with input drift tempcos below 8uV/degC, for example. Also mind all possible noise sources start to interfere into your business.. On the other hand the DAC resolution with the above schematics will be 1-2ppt (with a 200ppb/Volt OCXO). So the question is whether the stuff with those opamps will not be over-engineered  a bit

The PWM filtering - I would use a combination of tantalum and ceramics. The new ceramic multilayer capacitors (ie 10-22uF) have got an issue - their capacity drops down with applied DC bias - ie a 10uF/6V ceramic may drop to 2uF at 6V.

The PWM includes a lot of high freq content (ie the edges) thus ceramics in parallel with the tantalum one may help. Also mind the PWM made by atmel328 will always copy its 5V Vcc noise and stability..

Before posting, I looked on Digikey's site for the cheapest rail to rail I/O from Maxim. Why Maxim, because they have a pretty good sample program  . I'm not an experienced designer so I may have missed something but look at MAX4232AKA, the cheapest in stock for $1.73 CAD. Offset voltage tempco +/-3uV/°C, sounds really good to me.
I agree that it may be a bit over engineered but hey, this is just for fun, for experimenting.
Talking about ceramic capacitor voltage bias characteristic, the manufacturers publish such data so you can select a capacitor that has the desired capacitance at the control voltage that your OCXO needs. This circuit is particularly predictable since the variation around that voltage is minuscule.

[Miti]

Just for fun, my Lars GPSDO and a second Ublox Neo M8T set to output 10MHz. The time-pulse jitter for this module should be +/-11 nS but looks a bit higher to me but maybe my signal is too weak, I'm using a small antenna in the window.

[iMo]

Just for fun, my Lars GPSDO and a second Ublox Neo M8T set to output 10MHz. The time-pulse jitter for this module should be +/-11 nS but looks a bit higher to me but maybe my signal is too weak, I'm using a small antenna in the window.

The 10MHz output from Neo 7/8 is broken. The clean output frequencies are those = 48MHz/N, where N=integer (like 4,5,6,..). It has been discussed few times here.

[Miti]

The 10MHz output from Neo 7/8 is broken. The clean output frequencies are those = 48MHz/N, where N=integer (like 4,5,6,..). It has been discussed few times here.

You are right, it is broken and I forgot about that, that may be the reason why the jitter is higher than specified. 2MHz is not broken though and the jitter seems to be within the limits.

[hamster_nz]

The 10MHz output from Neo 7/8 is broken. The clean output frequencies are those = 48MHz/N, where N=integer (like 4,5,6,..). It has been discussed few times here.

You are right, it is broken and I forgot about that, that may be the reason why the jitter is higher than specified. 2MHz is not broken though and the jitter seems to be within the limits.

Humm, you think you have problems

Here is the PPS from two modules, both running in my front (equator facing) window for half an hour... that is quite a big spread, plus 250ns of lag...

[cdev]

Poke around in your vendors software for a cable delay setting. 

Also you should look at the power supply situation, make absolutely sure that either the two GPSs are on separate supplies that supply each adequate voltage and current independently, or if they are on the same supply that the current draw from one isnt impacting the power supplied to the other significantly, in other words, make sure you have enough power to have the voltage stay stable to both at the peak current.

The 10MHz output from Neo 7/8 is broken. The clean output frequencies are those = 48MHz/N, where N=integer (like 4,5,6,..). It has been discussed few times here.

You are right, it is broken and I forgot about that, that may be the reason why the jitter is higher than specified. 2MHz is not broken though and the jitter seems to be within the limits.

Humm, you think you have problems

Here is the PPS from two modules, both running in my front (equator facing) window for half an hour... that is quite a big spread, plus 250ns of lag...

[iMo]

In case you plan to use the Neo modules for time/freq measurement purposes always use, for example, the external "28dB 3m cable" $3 antenna and put it outside your window..

[Bryan]

May want to look at page 40 on the discussion on using ground planes with these puck antennas.

https://www.eevblog.com/forum/projects/a-look-at-my-symmetricom-gpsdo-(ocxo-furuno-receiver)/975/

[Miti]

In case you plan to use the Neo modules for time/freq measurement purposes always use, for example, the external "28dB 3m cable" $3 antenna and put it outside your window..

I'm using Trimble 56237-50 and it is located in my basement's window. It only sees the west side of the sky. Talking about Ublox modules time mode, how do you put Neo M8T in time mode? This is what I did:
- In TMODE2 I selected Time Mode = 2 - Fixed Mode
- Fixed Time Mode True Position I entered the Long, Lat and Alt indicated by U-Center
- In  NAVX5 I restricted Min/Max SVs to 1 -3
- In NAV5 Min SV Elevation = 10 deg

What's the difference between TMODE, TMODE2, TMODE3? What are the best settings for a GPSDO setup with a small patch antenna like this?

[Miti]

My version of Lars GPSDO with TC=500 did not loose lock once after I enabled temperature compensation.

Good job Lars, thanks!