Lars DIY GPSDO with Arduino and 1ns resolution TIC

[Dbldutch]

Hi metrologist (and others),

Here are the results of my learning experience with the ADC measurement of the TIC signal.

In the scope picture ending with 3514, on the bottom trace (in yellow) you can see the TIC pulse measured on the anode of the Schottkey diode, coming from the HC4046. The blue trace is measured on the A0 ADC input from the Arduino nano. The voltage is quickly rising until the end of the pulse and then starts to decay again. The pulse width can be anywhere between a few ns up to the maximum of 1us. The voltage at the ADC input is therefore a reflection of the pulse width. Note that due to the loading of my 10x (10Meg) probe, the 10Mohm resistor (R2) has the probe impedance of 10Mohm in parallel so the 10M becomes approx. 5Mohm, resulting in halving the discharge rate of C1, the 1nF capacitor.

In the text of Lars's document, he mentions that "As the 1PPS gives an interrupt to the processor the ADC will measure the voltage almost immediately after the charge is ended." While true in essence, the reality is that the Arduino is not that quick.

In the picture ending with 4342, the yellow trace shows the TIC signal again from the anode side of the diode. The blue trace shows the period of the ADC measurement. I made this possible by adding "probes" to the ISR code:

ISR (TIMER1_CAPT_vect)
{
  timer1CounterValue = ICR1;  // read the captured timer1 200ns counter value
  digitalWrite(Trigger,1); // Trigger high
  TIC_Value = analogRead(A0);  // ns value
  digitalWrite(Trigger,0); // Trigger low
  PPS_ReadFlag = true;
}

Two things are important to know. The Arduino has a bit of a complex hardware interrupt system. The final entry into the ISR is not very stable in terms of timing. Second, the ADC read takes-up a lot of processor time. The blue trace shows the time of this cycle, plus the time of the output port changes, they also take-up some processor time.

I don't know where in this period exactly the signal is sampled. (You could find out and measure this by using a precise ramp and compare the ADC reported  voltage alongside the ramp voltage)

The last picture (1344) shows both signals again but now in more detail so you can see that the sampling takes place quite some time into the discharge cycle of C1. Note that I had to use a scope probe, but even so, "immediately", is probably not what you expected.

Does it matter for the PI loop?
Not really, as long as everything is relative to each other.

Another take-away is that some designs went through extra hardware to create a constant current source to have a better charging linearity. This shows that this is a rather futile action. Time and effort would be better spent on the discharge cycle.

One idea that I have would be to eliminate the 10Mohm discharge resistor, and use a port from the Arduino to take care of the discharge cycle. I have not tried this yet, but my plan would be to use a digital port and set that as an input. This is a very high impedance state. Just after the ADC has sampled the pulse, which should now stay much flatter because there is virtually no loading, only leakage. I would then change the port to output, drive it low to discharge the capacitor and then turn the port back into an input again. All within the ISR. I could not find any reliable information on how hi-Z the digital inputs really are, but if you don't use pull-ups, it should be many times higher than 10Mohm, maybe well into the 100Mohms.

Anybody care to comment or elaborate?
Tks, Paul

 

[thinkfat]

I'd say the actual shape of the discharge curve is not really an important factor, as long as it's a constant between measurements and the sampling point doesn't jitter too much. What you're interested in is not the actual measurement but the difference between the measurements, which represents the drift.

[Dbldutch]

Hi thinkfat,

That’s what I was saying, I think.

There is however a jitter factor due to the fact that the Arduino has no “real” interrupt, and I don’t know how much that varies. I will try to see if I can measure that, and how much of a factor that really is, because that could potentially be a factor for the PI loop. Although nice to know, there’s little you can do about it with this processor architecture.

BTW, I’m not implying that there’s something wrong anywhere with Lars’s design, far from it, I ’m just exploring, learning and trying to explain.

MfG,
Paul

[thinkfat]

Hi thinkfat,

That’s what I was saying, I think.

There is however a jitter factor due to the fact that the Arduino has no “real” interrupt, and I don’t know how much that varies. I will try to see if I can measure that, and how much of a factor that really is, because that could potentially be a factor for the PI loop. Although nice to know, there’s little you can do about it with this processor architecture.

BTW, I’m not implying that there’s something wrong anywhere with Lars’s design, far from it, I ’m just exploring, learning and trying to explain.

MfG,
Paul

If the jitter has a Gauss distribution, it will be averaged out, so it's not really a factor. I'd be more concerned about temperature drift of the 1nF cap and the two resistors. That's a systematic error you'd need to actively compensate. A 10Meg resistor isn't a really practical value, you're getting into the range of the input resistance of the ADC there. But again, as long as it's an invariant between the measurements it's not a factor. Regarding the dimensioning - you need a sufficient discharge current, you need to bleed the storage capacitor sufficiently so that the next pulse can charge it up again.

So in other words, I do agree with your proposed change. Get rid of the impractical 10M resistor and instead use an I/O pin to drain the stored charge. You can put a resistor in series to limit the discharge current but it should be OK, I think. This way, you can probably achieve a less steep discharge curve which will help with the inevitable jitter of the sampling point. But temperature compensation is probably the more important measure to be taken.

[metrologist]

When I thought of testing the system stability, I'd thought it would be good to use a more stable PPS, such as from a divided 10M OCXO or even from the same OCXO being tuned.

[iMo]

The -2mV/C TC of the diode is much higher than TC influence of the 3k9 resistor (say 50ppm) and the 1nF capacitor (Lars had recommended C0G/NP0 one afaik). Use the TDK one as Kleinstein and AlexN recommended here:
https://www.eevblog.com/forum/metrology/diy-high-resolution-multi-slope-converter/msg2763326/#msg2763326

[thinkfat]

I was thinking about going for a PPS capacitor, like https://www.mouser.de/ProductDetail/667-ECH-U1H681GX5
But there's no temperature coefficient for capacity or leakage specified... That puts me off a bit. I may go with the TDK C0G/NP0 instead.

[sundance]

@Dbldutch:

There is however a jitter factor due to the fact that the Arduino has no “real” interrupt

Just out of curiosity: Is this verdict based on the fact that there is no constant delay from receiving an interrupt request to actually start the ISR, because the current instruction is finished before the IRQ is acknowleged (and different instructions have different execution times)?
Or am I missing something else?

[thinkfat]

When I thought of testing the system stability, I'd thought it would be good to use a more stable PPS, such as from a divided 10M OCXO or even from the same OCXO being tuned.

I'm probably going to try using another GPSDO I own for testing. The 10MHz output should be reasonably stable and the 1PPS output would be locked to it, sounds like a good testbed.

[Dbldutch]

I spent some time measuring the interrupt latency from the 1PPS signal together with the "probes" in the ISR. (see my post above)
It seems there is a source of jitter that does matter in the PI loop and the overall stability.

I have triggered the scope directly on the 1PPS pulse and acquired the ISR "probe" that signals the start of the ADC read cycle.
As you can see, there is no Gaussian distribution and the jitter is up to about 200ns. We have already seen that the discharge curve of the 1nF capacitor is not linear, so the resulting voltage, that drives the DA convertor and therefore the VC of the oscillator will show this too.
How much depends on the amount and effect of the software filtering.

To eliminate this source of jitter, we have to change the discharge method by the 10Mohm resistor, which is also a significant source of Johnson noise.

I will try to change the hardware and software now with my proposed solution and make some more measurements. Unfortunately, I don't have a FET probe, so the discharge effect of the x10 probing stays until I have found another way of probing C1. I have some ideas...

Stay tuned,

Paul

[Dbldutch]

Well, here's a surprise...

I removed the 10Mohm resistor and made a connection to port D10 with a 1K SMD resistor to C1.
I made the changes in the ISR to force the voltage on C1 to ground right after the ADC statement and made a few measurements.
No dice. It turns out that the voltage on C1 is already at ground level by the time my contraption is activated.

I suspect that there is much more leakage (must be the ADC?) than anticipated.
I added the raw ADC value to the display logging to see the result with and without my x10 probe, nada, no major change.

I added a 1% mica capacitor of 1nF in parallel, no major improvement. You can't go much higher because the rise time will become too slow.

So even after disconnecting the port connection to C1, and no probing from my scope it still worked. Go figure. 
Below is the ISR period including my port manipulation which is activated at the very end of the pulse.

I still get a lock and everything seems to work well...

Can somebody please verify this in his or her circuit?

Tks,

Paul

[iMo]

So how much time does it take from end of charging the 1nF to actual ADC sample and hold (plus minus the 200ns jitter)??

PS: The leakage via the 1N57xx schottky could be 10nA, via the ADC pin's clamping diode say 5nA..
You may improve that by replacing the schottky by the BAV199 and put a jfet/mosfet opamp in front of the ADC. But the input clamping diodes at the opamp's input will still leak..

PPS: in 10us 137us it drops 10mV, it discharges to 1% in 18ms (with 500ns input pulse)

[Dbldutch]

imo,

Have a look again at the screenshot in an earlier post with the number ending in 4342.
That has the "probes" surrounding the ADC read instruction.

The ADC conversion time is specified to take between 13-260us in the ATmega328P AVR datasheet.

Also the entry into the ISR and the departure take-up a lot of time as well.
I will work on that next, but before we start to speculate I would like to get clarification that what I'm seeing is the way it is, and not a  pilot error from me.

Enjoy!
Paul

[iMo]

With 200kHz ADC clock the S/H is done 7.5us after the start of the conversion and ADC is completed in 67.5us.
Provided the ISR takes 1.5us, the S/H is done in 9us. The 1nF voltage drop I see in the simulation is something like 1.1mV in 9usecs..

[thinkfat]

With 200kHz ADC clock the S/H is done 7.5us after the start of the conversion and ADC is completed in 67.5us.
Provided the ISR takes 1.5us, the S/H is done in 9us. The 1nF voltage drop I see in the simulation is something like 1.1mV in 9usecs..

That should not be a huge problem, right? The ADC is 10bit resolution, I guess using the internal reference of 1.1V. 1 LSB = 1mV. The ADC is spec'd for +/- 2LSB absolute accuracy, so 1.1mV should still be in the noise. So, you would not loose TIC resolution there.

[iMo]

Your ADC noise would be much higher provided your wiring and decoupling is not perfect.
4LSB p-p is a good result already, imho.
Also the 1PPS is not jitter free.

[thinkfat]

You could poll the pin connected to the 1Mhz signal to start the ADC conversion, instead of using an interrupt. That should eliminate one source of jitter. Or, connect the comparator output before the diode to another pin and poll that for the falling edge.

[iMo]

When looking at the oscope picture 4342 above - the actual ADC starts around 8us after the falling edge at the anode, the S&H is done at around 21us, the ADC finishes after ~114us (it looks like the ADC clock is ~120kHz).

What is the issue - the voltage at 1nF drops to almost 35% of the voltage @10us(!) for 1us input pulse - picture 3514 (with 5Mohm resistor = 10Meg || 10meg_probe). At 21us it would be 15%.

Doublecheck whether your oscope probe is set to 10x (10Meg).
Doublecheck the values of 3k9, 1nF, 10Meg in your wiring.

It seems like your 10Meg resistor is 10k in reality (with 10k the simulation shows drop to 38% @10us).

PS:
with 10Meg in the simulation the voltage drops 2.5mV in 21usecs (990ns input pulse).
with   1Meg in the simulation the voltage drops  20mV in 21usecs (990ns input pulse).

[thinkfat]

I'm wondering if a dual-slope converter could be an alternative approach... Basically, you'd charge a capacitor with the pulse from the phase discriminator through a resistor, then discharge it through the same resistor and measure the time the voltage stays above a certain threshold... This should double the resolution against just counting out the length of the pulse, no?

Don't mind me, I'm just thinking aloud...

[iMo]

Another thought - you may put there the TDC7200 (~50ps resolution), no need to mess with analog, the arduino library is available..
http://www.ti.com/lit/ds/symlink/tdc7200.pdf

PS: the calibration clock for the 7200 could be the OCXO itself. You may measure the time between rising start and stop edges, thus you may remove the 4046 too.

So you would need the 7200, 74HCxxx divider such you get the time diff somewhere into the 7200's range, atmega328p, and the PWM DAC as it is today.

The time difference between the 1PPS rising edge and OCXO's edge (divided say to 0.5MHz = 2us period) could be set such the middle will be 1us and the regulation range will be +/- 500ns.

7200 will then return results in Mode 2 from 500ns to 1500ns (that is -500ns to +500ns diffs) with 55ps resolution, 28ps accuracy and 35ps standard dev (see DS).
Btw, 500ns with 55ps resolution is 9090 counts
With good pcb layout the standard dev could be close to 35ns, that is 200ps p-p noise, imho.

[thinkfat]

I have indeed seen that chip mentioned in another thread about GPSDOs and was looking at the datasheet.

If I'm not mistaken, there is a mode that measures the time between the start pulse and the next reference clock edge. That would be exactly the same input as in Lars' design, phase difference in the time domain, just fully digital and without the dependencies to leakage and temperature.

What I don't understand yet is if the start and stop pins can just be tied together to form a TIC. It's not entirely clear from the datasheet. I think the chip disables the start detector while waiting for the stop pulse, so that should be all good.

[iMo]

There is no need to wire the start and stop pins together. The start pin will be wired to, for example, 1PPS and the stop pin to the OCXO's 500kHz. There will be none 4046. 7200 will measure the "time between the rising edges of those two signals" - it returns the difference "stop_rising_edge-start_rising_edge". Thus the same as it is today with analog TIC.
The 7200's start and stop pins are both rising edge sensitive.

PS: the 7200 replaces 4046+schottky+3k9+1nF+10Meg+ADC. The ISR will read 7200 (via SPI interface), and returns a number between 500000 and 1500000 (for 500ns to 1500ns difference between the edges, where the "middle" is 1000ns). The returned numbers will be "noisy", of course (as it is today too).

The atmega's sw needs to be adjusted accordingly  - the control loop should be trying to set the OCXO's EFC voltage such the by 7200 returned number will be as close as possible to (500000+1500000)/2 = 1us, that will be the "exact 10MHz".

Why 500ns to 1500ns difference result? Today's system works such the analog TIC measures the difference with the result ranging 0ns-1000ns where the middle is 500ns. That 500ns (the middle) creates aprox 0.5V at the 1nF capacitor - that is in the middle of the ADC range. Current sw is chasing the middle, of course.

You have to adjust that because 7200 needs to be operated in certain range. Mode 1 is 12ns to 500ns for the "edges differences", while the Mode 2 starts at 250ns up. So let us take the Mode 2 and position the edge's difference as I suggested above.

You may think on a different differences range, sure. The 7200 is much more flexible in that regard, as there are not such limits as with the analog TIC used today.

PPS: I would also suggest to migrate the Vcc to 3.3V. Atmega328b works fine at 3.3V/16MHz. The 7200 is 3.3V.
You have to amplify the PWM DAC's amplitude to something like 1..7V to fit various OCXO's anyway.

EDIT: corrected the expected values the TDC7200 arduino library returns..

[thinkfat]

Hi, thanks for all the valuable input. I'm not afraid to change the code, I'm going to use a different MCU anyway. Likely, STM32F030 in LQFP-32 or TSSOP-20 package, if I can fit all the interfaces. Currently, I'm looking at two serial ports, one debug, one to a GPS module, SPI for the TDC, maybe another I2C for an external DAC (if I can convince myself that it's better than a PWM DAC). That might not fit the small 20pin package.

[iMo]

Regarding the DAC - make yourself a calculation on the required DAC resolution.
Input is the OCXO's gain in Hz/Volt (for example 1.5Hz/V).
Do compare the DAC's EFC voltage step with the TIC resolution such it finetunes somehow.

PS: here you may see (very bottom picture) how the TDC7200 returns a measurement of 100ns time difference (x-axis is the sample number, y-axis the actual time interval in ps), all wired on a cheapo solderless breadboard
The standard deviation was ~150ps, 4x worse than with proper design.
Do not do it that way, use by TI recommended layout with good start/stop signal impedance matching instead..

https://www.eevblog.com/forum/metrology/how-to-test-a-diy-counter-with-gpsdo/msg1808444/#msg1808444

[Dbldutch]

Hi guys,

To try to solve the mystery with the too fast de-charging of the 1nF cap., I completely rebuild the circuit.
While de-soldering, there was nothing wrong, apart from some solder flux underneath the SMD components (R1, R2 and C1).
The values all measured correctly. I use the suggested 1N5711 as the Schottkey, it seems to be working fine.

My scope probe is a decent quality x10 one (TESTEC HF series), without a switch.

I replaced the COG 1nF SMD cap with a small radial high quality 1nF COG capacitor.

I made the measurements again with and without the 10Mohm resistor in the circuit. There is NO change on the waveform. This is plausible because the effect of the 10M and/or the 10x probe is dwarfed by whatever else is loading the circuit. Believe me, there is nothing else connected or otherwise attached to the circuit. It's no rocket science, and there really is no magic involved. 

Below is the "probed" ISR :

ISR (TIMER1_CAPT_vect)
{
  timer1CounterValue = ICR1;  // read the captured timer1 200ns counter value
  digitalWrite(probe, 1);     // create a signal to probe the ISR with a scope
  TIC_Value = analogRead(A0); // ns value
  digitalWrite(probe, 0);     // stop the probe
  PPS_ReadFlag = true;        // gives the decharge cycle some time as well
}

The bottom trace (yellow) on the attached picture shows the probes surrounding the ADC read cycle.
The top trace is the voltage across C1, without the 10Mohm resistor present, but of course with my 10x scope probe. It also should have an impedance of 10M. (look it up if you doubt that)

As you can see, the de-charge of the capacitor has finished way before the end of the ADC cycle.

However, the circuit as is, with or without the 10M (resistor or probe) works!

So as a next step, I changed the code to show the raw ADC readings in the second column of the report. Below is one drift cycle.

2370   56   -39   33691   93.9   ****      49   560   500   1   23934   56.6   1120   0   0   0      
2371   20   -70   33680   93.5   ****    -32   200   500   1   23934   56.8   1121   0   0   0      
2372   29   -63   33683   92.8   ****       8   290   500   1   23933   56.7   1122   0   0   0      
2373   8   -81   33676   93.2   ****    -18   80   500   1   23933   56.8   1123   0   0   0      
2374   10   -79   33676   92.9   ****       2   100   500   1   23932   56.9   1124   0   0   0      
2375   18   -72   33679   92.5   ****     7   180   500   1   23932   56.6   1125   0   0   0      
2376   3   -85   33674   91.3   ****    -13   30   500   1   23931   56.7   1126   0   0   0      
2377   3   -85   33674   90.4   ****       0   30   500   1   23931   56.9   1127   0   0   0      
2378   4   -84   33674   88.6   ****       1   40   500   1   23930   56.5   1128   0   0   0      
2379   0   -88   33673   88.5   ****      -3   0   500   1   23929   56.6   1129   0   0   0      
(Note that I did not have the two LM35 connected properly - I use "****" instead op UnLocked))

The values, ranging here from 0 to 56 are relative to what I see on my scope, so the actual ADC reading of the value must be at the very beginning of the cycle. Luckily, just before the capacitor is completely discharged.

When I dis-connect my scope probe, and the circuit is still without the 10Mohm resistor, the ADC values are almost exactly the same. As to be expected.

I would like to re-iterate that there is no strange connection anywhere on the circuit board that would explain the way too fast discharge.
By simple deduction, the only unexplained factor that remains is the loading or low impedance of the ADC input of the Arduino processor itself.

The specifications list 100M as the impedance, as you would expect from a CMOS device, but wait, there is a gotcha! I also found this:

During an actual sample, the input resistance is temporarily a lot lower as the sampling capacitor is charged up so it is recommended that whatever you connect to the A/D have an output impedance of 10k or less for best accuracy. This is to allow the A/D input capacitor on the sample and hold to charge up in the time allotted to it between switching the input multiplexer over and starting the conversion. As you may know the arduino analogRead() function is designed and assumes the source impedance of voltage to be read is 10K ohms of lower. The fact that the AVR adc has but a single sample and hold capacitor but multiple multiplexed analog input pins means that you have to deal with the problem that is trying to read a high impedance signal.

Remember that the same ADC s/h circuit is also used for the two temperature inputs (A1 and A2)

I think the 10K output impedance clarifies what I'm measuring pretty well, unless there is something else and I have it wrong. 
Is there one of you that can contribute or confirm this?

The big question however is: do we really care with all this if Lars's design works? (with or without the 10Meg)

Well, in my opinion only if you want to have a "real" 1:1 representation of the TIC value in relationship with the pulse width. (Yes I do care)

If so, the solution would be to add an op-amp as a non-inverting voltage follower between the C1 capacitor and the ADC input and also add my proposed circuit and code changes to dis-charge the capacitor under program control after an ADC measurement has finished.

Does this make sense?

Paul