Will my input stage blow up?

[void_error]

Well, not actually blow up but stop working in any way with signal applied and powered off...

I've been looking for an answer to this but all I could find is this and a simplified schematic of the op amp I'm using - AD8065.

You can find the schematic here, input signal is labeled SIG_IN, second page. Something that's not up to date is the power rail sequencing I'm currently working on, so you can safely assume that every rail on the page will be disconnected by MOSFET switches.

Anything pointing me towards an answer would be greatly appreciated.

[Zero999]

The diode connected transistors Q201 to Q204 should protect the input stage of the op-amp from input voltages outside its supply range, so having the input connected, when the circuit is unpowered won't cause any damage.

[T3sl4co1l]

FYI, as shown you've got a +/-1.2V or so clamp, which isn't a very wide range.  Also, the >= 1M input impedance into the ~20pF B-E capacitance forces a maximum bandwidth of 8kHz.  You certainly won't need to spend all that money on a 120MHz opamp!  But I'm not sure that this would be all that practical for a frequency counter.

To get 120MHz BW into 20pF, you need a "speed-up" cap, of the same value as the clamp, divided by the attenuation ratio.  Unfortunately because your attenuation ratio is 1 (i.e., it's not dividing anything), there's no room for a "speed-up" cap in it (or, pedantically speaking, your only solution to the equation requires a negative capacitor -- not an outright impossibility, but hardly a practical one).

You probably need a capacitor in parallel with R209 for stability, and with R206 to maintain bandwidth, for precisely the same reasons but working against U205's input capacitance (2-5pF plus strays) this time.

If you need a wide range, high bandwidth, very high impedance, very low capacitance input circuit, consider the bootstrapped JFET follower circuit that oscilloscopes typically use.  You will need to sacrifice gain for bandwidth, using speed-up caps on attenuators, to compensate for their resistance and load capacitance.  You can also use the opportunity to bootstrap the clamp/ESD diodes, so they have less effect on the signal.

Tim

[void_error]

FYI, as shown you've got a +/-1.2V or so clamp, which isn't a very wide range.  Also, the >= 1M input impedance into the ~20pF B-E capacitance forces a maximum bandwidth of 8kHz.  You certainly won't need to spend all that money on a 120MHz opamp!  But I'm not sure that this would be all that practical for a frequency counter.

Oh, forgot to change the value of that, it'll definitely be a lot lower. I'll play with that bit in LTspice.

To get 120MHz BW into 20pF, you need a "speed-up" cap, of the same value as the clamp, divided by the attenuation ratio.  Unfortunately because your attenuation ratio is 1 (i.e., it's not dividing anything), there's no room for a "speed-up" cap in it (or, pedantically speaking, your only solution to the equation requires a negative capacitor -- not an outright impossibility, but hardly a practical one).

I'm aiming for roughly -6dB @ 100MHz.

You probably need a capacitor in parallel with R209 for stability, and with R206 to maintain bandwidth, for precisely the same reasons but working against U205's input capacitance (2-5pF plus strays) this time.

If you need a wide range, high bandwidth, very high impedance, very low capacitance input circuit, consider the bootstrapped JFET follower circuit that oscilloscopes typically use.  You will need to sacrifice gain for bandwidth, using speed-up caps on attenuators, to compensate for their resistance and load capacitance.  You can also use the opportunity to bootstrap the clamp/ESD diodes, so they have less effect on the signal.

Tim

Thanks for the tip again Tim.
As for the scope-like input circuit, I might be biting off more than I can chew.

[void_error]

Possibly a dumb idea... but it might just work: use a relay to disconnect the input. Something like this one?
That way I could increase the clamping voltage to something like +/-5V, and supply the AD8065 with something that would make the +/-5V input be within its input range.

 

[Zero999]

Reading the datasheet, none of this is necessary. The diode connected transistors Q201 to Q208 aren't needed. The AD8065 already has built-in ESD protection diodes connected between the inputs and from each input to either power supply terminal. Refer to page 17 of the data sheet. With such a high input impedance, the current will be small enough, not to cause any problems, unless you put stupidly high voltages into it.
http://instrumentation.obs.carnegiescience.edu/ccd/parts/AD8065.pdf

As mentioned above, don't expect great performance. with such a high input impedance, even without a diode connected transistors.

[void_error]

The AD8065 already has built-in ESD protection diodes connected between the inputs and from each input to either power supply terminal. Refer to page 17 of the data sheet.

How did I manage to miss that? I must be either tired or stupid. I've also linked the wrong datasheet, there's a newer revision out there.

...unless you put stupidly high voltages into it.

I'm probably going to. Time to see what it takes to blow it up then, at least on paper. 30mA is the maximum input current. It looks like it's going to be a trade-off between performance and it being reasonably idiot-proof.

[Zero999]

How idiot proof does it need to be? You need 30kV to get 30mA, through a 1M resistor! Obviously an ordinary ¹/₄W resistor will be toast, long before then.

Go with a more sensible resistor value, such as 10k and put a 3.6V zener across the 3.3V supply and a 6.2V zener across the 5V supply, to protect the power supply voltages from rising too high due to high input voltage spikes. To get the full bandwidth, a 22pF capacitor across the resistor will help.