Inductor saturation tester, alternative route to dump the excess energy ?

[jahonen]

Well if you want to use a gate transformer, then besides using a some kind of charge pump technique (this would make the pulse somewhat difficult to control) to reduce duty cycle problems, there is no other way to avoid saturation problem than just increase the primary inductance to avoid saturation problems. You can test this by increasing all inductances by factor of x, that way the maximum pulse length is also increased by a factor of x.

Regards,
Janne

[BravoV]

Well if you want to use a gate transformer, then besides using a some kind of charge pump technique (this would make the pulse somewhat difficult to control) to reduce duty cycle problems, there is no other way to avoid saturation problem than just increase the primary inductance to avoid saturation problems. You can test this by increasing all inductances by factor of x, that way the maximum pulse length is also increased by a factor of x.

To be honest, I'm not expecting that this is becoming complicated because of my wish to be able to adjust the test voltage on the inductor.

Still hoping that JDB can come out with solution, of course still wishing if possible to use junk box type components, then it will be the best. 


@JDB

What if the driver part is using higher supply voltage ? Say like 20 or even 24 volt ? Will this condition make it easier to design the circuit but yet simple ?

Don't have any problem at all to make a dedicated high voltage DC supply for the driver part while leaving the inductor test voltage to be supplied by a bench PSU so the voltage can be adjustable.

Again, as an EE wannabe I'm not sure what I'm talking about here, just a wild idea. 

[jahonen]

If you want it just to be simple, and do not care about initial gate current glitch in current sense, why not just do it this way? As you can see, even with no supply at all and just charged caps, you can fire quite a few pulses before the caps become discharged, so there is plenty of time to charge the discharge bank capacitors between pulses. This way, you can adjust the current decay rate by adjusting R2, but of course keeping eye on how high the voltage becomes on fet drain.

Anyway,  in practice even without the current decay speedup, the recovery is fast enough to have results in reasonable time period.

Regards,
Janne

[jahonen]

Another version with an experiment with energy recover with a transformer. Don't know if that transformer contraption could actually work.

Regards,
Janne

[GK]

Hi Group,

I have been busy building. Here are the results of my efforts.

Schematic:

This looks like a hazardous circuit to use. If you set the input pulse duration too long it will blow up as there is no protection circuitry to limit the MOSFET current when the inductor under test saturates. At a minimum I'd power it with a current-limited bench supply.

[Jay_Diddy_B]

Hi group,

I have had another go at designing the circuit. I want to thank everybody for their inputs. This is a tricky circuit to design.

This concept includes:

1) The control power supply and the power supply for the bridge are separated. The bridge supply can be set to from 0.5V to 30V (upper end depends on component voltage ratings.

2) The circuit will work with pulse widths from around 0.3us to 0.5ms

3) The circuit includes over current protection. As presented the current trip is set to approximately 10A

4) No exotic components are used.


I have attached the LTspice model for those wanting to test the circuit.

Edit: Q8 was drawn upside down. I have removed the LTspice file. See the next entry

Jay_Diddy_B

[Jay_Diddy_B]

Hi,

I made a small mistake. Q8 was drawn wrong.

I have fixed my mistake.

The corrected files are attached.

Jay_Diddy_B

[BravoV]

@Janne,

The chart is proofing that the 2 x 2200 uF caps alone is plenty, still capable of serving many pulses and yet still strong, not bad, learned something new, thanks.    Your second concept design using transformer looks interesting and really intriguing , I might try it once I have a working one with the "traditional" design !

This looks like a hazardous circuit to use. If you set the input pulse duration too long it will blow up as there is no protection circuitry to limit the MOSFET current when the inductor under test saturates. At a minimum I'd power it with a current-limited bench supply.

Thanks for the reminder, JDB already made this into the new revision. The plan is to use a bench PSU that capable of CC.

I guess there are advantages too to leave this circuit like current state which is not a complete ready to build circuit, like no pwm generator part, no power supply section and a bit vague on high current components like mosfets and power schotky diodes, hopefully at least this will lead others (hobbyist/enthusiast grade) that is planning to build this to learn and understand how it works 1st and the risk involved. 

This concept includes:

1) The control power supply and the power supply for the bridge are separated. The bridge supply can be set to from 0.5V to 30V (upper end depends on component voltage ratings.

2) The circuit will work with pulse widths from around 0.3us to 0.5ms

3) The circuit includes over current protection. As presented the current trip is set to approximately 10A

4) No exotic components are used.

Looks great JDB, thanks alot, ha..ha.. that max pulse length 0.5 ms is overkill, but its nice. 
I can see you've increased the sense resistor ten folds for the current limit mechanism to be able to kick in.

In my build, I think I will skip that current limit section and going to use 0.01 Ohm and coupled with an op-amp buffer like Janne did for the current sensing signal to the scope. Planning to use a jfet LF411 (I got many of it in my junk box and also it has offset adjust) as the buffer, this should be good enough right ? Yes, it will have the negative rail provided by ICL7660 charge pump.

Just glad we are at this stage now that we're able to adjust the inductor testing voltage, just happy that this EE wannabe's idea is workable, again thanks to you.

Ok, I'm going to draw the circuit of my version, and I guess I will bug you again for the approval stamp. 

[Jay_Diddy_B]

Hi group,

It is time to report on the Inductor saturation tester project. I have built a new version.

Here is the schematic:



Here is the PCB Design:



And the construction:





Here are some of the test results:

The red trace is the inductor current. The blue trace is the output from the inductor tester 50mV/A. The black trace is the input from the pulse generator.

Current limit at 9.4A



Low voltage operation, long pulse operation. The voltage applied to bridge was 0.7V



High speed 1us pulse. You see that one side of the bridge is delayed by about 300ns. For this screen shot 30V was applied to the bridge.




I have attached a pdf of the schematic.


Jay_Diddy_B

[GK]

Here is the schematic:

Hi

R8 is going to dissipate a lot of power when your two-transistor over-curent SCR fires. You'd be better off using the SCR to pull the collector of Q4 low.

[PA4TIM]

I made this one. I had problems at first with the powersupply. Needed a very big one to make sure it did not started to oscillate.

But Jim Williams had one in an application note and to his idea I added the diode and RC.
No it behaves wonderfull and I can test inductors without problems.
It is in a plastic box, no heavy heatsinks.

1A/div
http://www.pa4tim.nl/?p=1859 here the rest of the pictures.

[Jay_Diddy_B]

Hi PA4TIM,

The circuit that you show certainly, works as evident in the scope photograph that you provided.

The Energy that is stored in the is = 1/2 L I²

The power that is dissipated in the resistor R2 is = Frequency x 1/2 L I²

Where

       Frequency equals the repetition rate of the test

       L = the value of the inductance in Henries

       I = peak inductor current

Some of the power will be dissipated in the MOSFET Q1, depending on the speed of the switching.

V2 can be made variable. Lower values of V2 can be used for smaller value inductors.


The current probe can be replaced with a current transformer, of the type found in switch mode power supplies.

The complexity of the circuit that I presented comes form the original posters request to recover the energy. My circuit will work with a very wide range of inductor and saturation current values.

You could put a current sense resistor between the negative end of the power supply and ground. The voltage across the resistor can be used to display the current.

Regards,


Jay_Diddy_B

[BravoV]

It is time to report on the Inductor saturation tester project. I have built a new version.

Duh ... ok, this is a bit of embarrassing  ,  I'm the who started this thread still haven't started anything yet, while you already built your 2nd one.   

Low voltage operation, long pulse operation. The voltage applied to bridge was 0.7V

This ... exactly as I was expecting, with the low voltage, the trace is not straight anymore and becoming more like a curve, thanks a lot for this particular scope shot.  Also this makes me to put a note when designing the pcb to add a reserve space for more additional bulk caps just in case I will be doing lots of low voltage testing. 

High speed 1us pulse. You see that one side of the bridge is delayed by about 300ns. For this screen shot 30V was applied to the bridge.

This one is interesting, but to be honest I'm lost, are you saying that when at the ON time, the lower fet was turned off late about 300ns compared to upper one ? A quick scratch on that shot using ms paint job to explain it if not troubling you too much.


JDB, as the pulse generator, my plan is to use the 555 as the oscillator (with pot for freq adj.) which generates a triangle, then this signal will serve as SYNC signal to the scope and also to a 311 comparator with pot for duty cycle adjustment. The noob question is, does the 311 output (with pull up resistor say 1 K) beefy enough to be connected to the input (R14) ? R13 will be omitted since its no longer needed.

R8 is going to dissipate a lot of power when your two-transistor over-curent SCR fires. You'd be better off using the SCR to pull the collector of Q4 low.

How much power is that ? As my EE wannabe calculation, that R8 (22 Ohm) should not dissipate more than 0.3 watt, CMIIW.


@PA4TIM
The one that JDB made here returns the rest of the inductor's energy back to the voltage source (bulk caps), so overall the circuit it self will consume quite low current as JDB previous post to proof that, of course with the exception of charging those bulk caps when powering them for the 1st time.
As strange as it sounds, like Janne said, this circuit is like a boost circuit but boosting it back to it self. 

[Jay_Diddy_B]

Hi BravoV and the group,

I will answer the most important questions today.

Here is a revised schematic, with the modification proposed by GK, this removes the possibility of high dissipation in R8.



The delays in the 1us pulse are a combination of the extra propagation through the inverting stage Q9. Selecting a special transistor for this location will shorten this delay. suitable transistors are 2N2369A or BSX20. These transistors have special doping which results in very short switching times. I didn't use these in the design for a couple of reasons:

1) I was determined to use readily available parts.

2) The distortions occur after the inductor performance has been measured. Note the difference between the current probe waveform, which is measured in series with the inductor, and the current measured from the sense resistor in the source of the N Channel MOSFET. The current probe has a bandwidth of DC to 50 MHz, so the current probe is giving a true representation of the waveform.

I will post a few more waveforms when I get back in the lab.

Jay_Diddy_B

[PA4TIM]

I like youre desing, that is not why i posted mine but I had dissipation and psu problems too at first. My 10A powersupply was not enough, i had to use a 100A PSU. But with the small changes all ks without cooling build in a small plastic cabinet and i can use allmost any psu. But I have never been over 10A for testing ( had no need for that)
A very handy piece of kit, used it always when I build a smps.

I do not measure current using probes like on the ( old) photo, this was the first version, i now use most times a Tektronix CT1 inline current probe or my P6042 that has a calibrated current/div reading.

[GK]

How much power is that ? As my EE wannabe calculation, that R8 (22 Ohm) should not dissipate more than 0.3 watt, CMIIW.

12V minus ~three Vbe's; approximately ~ 4.5W

Edit; actually it would be closer to half that as you will get a substantial voltage drop across the 2200 ohm pull-up due to the finite beta of Q1; still too high for a 1206.

[BravoV]

The delays in the 1us pulse are a combination of the extra propagation through the inverting stage Q9. Selecting a special transistor for this location will shorten this delay. suitable transistors are 2N2369A or BSX20. These transistors have special doping which results in very short switching times.

Thanks for the update, regarding the Q9, how significant the difference if using 2N2369A or BSX20 ?


Also need confirmation from experts, is it good enough for this purpose to build the pulse generator using these cheap components like this ?

[PA4TIM]

Depends on how fast the Tr of the pulses should be, they can not become faster as transistor in the compartor you used. If you want a sub-nano pulser you tie the base through 10K to gnd, 1M on the collector and the emitter to the bnc center together with 50 Ohm to gnd.
You feed the 1M around 80-110V and the bsx or 2n starts to avalance. I tried both transistors and they were close. I get a Tr under 500 ps ( it is the Jim Williams pulser)

[BravoV]

PA4TIM, I think you misunderstood my intention, I don't need those pico second Tr pulse, yes, I'm aware of that JW pulser, beside its not easy to control the pulse width either and make it useless for this circuit. OT, just wait for few weeks, I might build my self a < 150 ps Tr avalanche pulser, yup. not a typo, a 150 pico second rise time. 

For my need, I think starting from 1 us up to few tens of us or max at 100 us is enough, also if the di/dt is too steep like small inductor, all I need is just turn down the voltage at my bench psu and vice versa for huge inductor, so I believe the pulse width range should not be really critical, just need the pot to adjust until "the knee" is starting to form, cmiiw.

[PA4TIM]

Ok, i did misunderstood it because you used that fast transistor, i thought you were going OT ;-)  but now I understand.

150 ps is very fast, you need an even faster scope to do something with it ( and a long enough pulslenght) what is the purpse ? I an anxious to how you make that.

[BravoV]

150 ps is very fast, you need an even faster scope to do something with it ( and a long enough pulslenght) what is the purpse ? I an anxious to how you make that.

Ok, since you asked, even though out of topic. 
To get the hint click -> Here , and also check the list with my name that has the suffix "BFG" on it -> Here, now you know why. 

The reason is currently I'm lurking & stalking for quite sometime at local market at few used a Tek 7104 mainframes, so this 150 ps pulser might be useful for on spot checking if needed. 

[PA4TIM]

Then hou have to use a chargeline to make the pulsewidth longer. I use a 500 ps 40 MHz squarewave geberator to test high BW scopes. I can not get the 1S2 to trigger on an avalance pulser . Frequency and amplitude are too unstable. Frequency is to low for the prinitive triggering a a 1S2. Fror a 7104 it will do, but for adjusting/calibration you need a much longerpuls ( i did not get that trsnsistor to avalnce. The fastest I can make is 90 ps, the fastest pulse I build my selve was around 100 pds but that was with a thing I thought was an S-band diode but it dyed while experimenting. Later i saw a picture of something similair and that was a sort of VDR/spracgap thing ( a transient orotction) so maybe it was no diode. It was in my diode junkbox anf I just tried hoping one was a tunneldiode. Most ad no typenumbers printed on them.

[Jay_Diddy_B]

Hi Group,

We got a bit off topic with the avalanche pulse generator.

Here is an alternative to the Pulse generator proposed by BravoV



I used two 555 timer, the CMOS version of the 555 should also work, and probably better. The first 555 is configured as a fixed frequency oscillator at around 7kHz. This could easily be made variable. This is used to trigger a 555 monostable. The monostable is configured to give pulses from 1us to 23us with a 20K pot. The LTspice shows a voltage controlled resistor. The resistor is changed from 0-20K to show the variation in pulse width.

The advantage of this circuit is there is a hard stop on pulse width.

Here are the simulation results:




I have attached the LTspice model

I have not built this circuit, so consider it experimental.

Jay_Diddy_B

[BravoV]

Here is an alternative to the Pulse generator proposed by BravoV

The advantage of this circuit is there is a hard stop on pulse width.

I have not built this circuit, so consider it experimental.

Thanks for the new pulsegen circuit, yep, confirmed it has the hard stop and since its quite easy, built it in just few minutes and here are the results on the pulse it generated at the attached picture.

Pardon the rat nest breadboarding, yeah, it looks scary but it works, the pot for pulse width adjustment is not in the pic.

Scope shots, the whole signal, running approx 1.3Khz at quite low duty cycle with those floating dots represent very narrow/low duty cycle, and two last shots were the different pulse width adjusted approx. from 12 us down to about 3 us, didn't have the right pot yet. 

Again, thanks JDB, now the hard part, going to build the pcb. 

[c4757p]

Note: in the LTspice model the inductors do not have their saturation characteristics modelled.

They can. Set the inductance to "flux=L*N*tanh(x/N)" where L = inductance and N = saturation current.

I just built this tester as noted in this thread, and BravoV (who suggested it to me in the first place) said I ought to post pictures and whatnot here, so here you go. Thank you very much, Jay_Diddy_B, this works quite nicely.

Scope captures:
1. 200uH inductor wound on improper core (high permeability ferrite toroid)
2. 1mH inductor wound on the same core
3. Inductor from #2 with the core broken and glued back together. The inductance fell to 32uH.
4. Murata 32101C (100uH 1.4A)

Modifications:
1. AC terminated the trigger input (makes it easy to just throw in a square wave without worrying about overheating the termination or having to use a big one).
3. RC (1k/22nF) snubber keeps the inductor from ringing horribly when the diodes shut off.

Those transistors and diodes hardly get warm at all.