Stupid question on a P-Channel MOSFET switch

[angust_uk]

Hi all

I am designing a low-power device which includes an I2C sensor, and would like to disable its power when not in use to reduce standby consumption. I was planning on doing this as per the attached diagram, with a P-channel MOSFET, however when 'off' (the pin controlling !SENSOR-EN set as a high-impedance input), I'm seeing around 1.8V at the drain.

Am I doing something stupid (likely) or could there be a current path via the I2C pins (I connected the I2C pull-ups to the switched supply to try and avoid this)?

For reference, the device on the right (U2) is a Nordic nRF52832 and VCC is 3V.


Thanks!

[mvs]

Am I doing something stupid (likely) or could there be a current path via the I2C pins (I connected the I2C pull-ups to the switched supply to try and avoid this)?

nRF52832 may have internal pull-ups enabled on I2C pins... or there might be some small leakage through MOSFET. Measure drain current, not voltage, to know for sure.

[Peabody]

In addition to the body diode, your mosfet has an "ESD Protection Diode" between Gate and Source.  I don't really see how that could be the problem, but just raise it as being unusual.

I think your other explanation is the correct one.  Your sensor has protection diodes on its inputs which dump excess voltage to Vcc.  So any voltage applied to an input while the sensor is powered down will flow through to Vcc and charge any capacitor there, and possibly even turn on the device if the voltage is high enough.  Dave has a video on this - a processor running just fine with no expernal power at Vcc.

My guess is that if you change the I2C lines from the processor to output, low, or possibly just tristate them, when you want to power down the sensor, it will work.  The same would be true of the /INT pin.

Well, that's my guess.  The datasheet for the sensor says the absolute maximum rating for input voltage is Vcc +0.3V.  So if Vcc is at ground, all the I/O pins should be at ground too, or at least tri-stated.

[free_electron]

like others have said above

possible first

- most likely your SCL is a HARD -driven and not a open drain.
- When not communicating : make sure the I2C port gets both SDA and SCL switched to open drain with logic high applied.Also turn off any internal pull-up.

possible second:

the cpu output controlling the mosfet must also be of the open drain type.

possible third : when disabling the mosfet : make sure that the INT input also does not have any pull-up enabled.

[Kasper]

This video has some good warnings about how power flows through internal ESD diodes of components that are supposed to be off. Might explain your problem.

EEVblog #831 - Power A Micro With No Power Pin!

Check that your FET is wired properly. It is somewhat common to layout 3 pin devices wrong when mixing up top and bottom view.

On a side note, to further reduce power consumption, use a larger pullup on the FET. You should be able to find one that works with a 1Mohm, if yours doesn't.

[SiliconWizard]

To make sure, you may just have to disconnect the PMOS temporarily and look at U1's VDD.
That should allow you to see whether it comes from U2 or not. If you still have 1.8V at U1's VDD, then it is (and U2 is likely to have internal weak pull-ups on I2C lines). That, or U1 is drawing/leaking so little current when its VDD is below 1.8V that due to C2, you'd keep 1.8V there for a while. For the latter case, a simple test is also not difficult to do (disconnect U1 from U2).

[angust_uk]

Thanks all for the useful replies!