Question about creating a LIB timing file for a mixed-signal hardmacro

[emm386]

Hi all, I'm trying to manually write a liberty timing file (.LIB) for a mixed-signal hardmacro shown above. There are four outputs for this mixed-signal hardmacro: deserialized data (DESER_OUT[0~11], CLK_OUT, and RST_OUT). For the following digital RTL to be free from any timing violation, I need to come up with fairly accurate timing models for this hardmacro. While I was working on the LIB file, I've encounted few questions that I could not answer myself, so decided to get some help from this forum.

The tricky part of this setup, in my opinion, is that the pin direction of both CLK_OUT and RST_OUT are set to output. Because of this, I have quite a bit of confusion since most of examples in liberty user manual does not cover this type of scenario.

Q1: For DESER_OUT, shall I have two timing description, one with CLK_OUT being related_pin, and the other with RST_OUT?

Q2-1: One of the important timing information here is the skew between rising edge of data and rising edge of CLK. One method I am about to try is setting the CLK_OUT as related_pin for DESER_OUT bus, and then come up with LUT for cell_rise and cell_fall based on the simulation results. Do you think this is a reasonably good approach?

Q2-2: Do I also need to do the same thing for CLK_OUT and set its related_pin to RST? 

Q3: When RST is high, DESER_OUT and CLK_OUT are forced to go to low (0). when RST is low, then DESER_OUT and CLK_OUT are active and starts toggling. In this situation, what is the most appropriate timing_sense value for DESER_OUT when its related_pin is RST? is it supposed to be positive_unate? negative_unate? or non_unate?

Q4: what about timing_types? What would be the most appropriate timing_types for all three signals?

Q5: are cell_rise, cell_fall, rise_transition, fall_transition good enough for timing description in general?

Any feedback/comments would be really appreciated !