High Speed, Low Power LVDS Isolator?

[DedeHai]

Hi,

this is more of a 'coult this work' than a real application question. I apologise for the long text with no pictures... if this sparks interest I will put in some more effort. So here goes an idea I had at work today:
As some may have encountered as well, sometimes you need isolated digital signals. If then are of high data rates, LVDS signals is often the way to go. There are high speed (say 200MHz ore more) digital Isolators, like the fancy new ADN4621 but they are expensive and draw quite a lot of current, about 60mA on primary and secondary side in this case. While these ICs are a nice solution I was thinkging: what if I would just be using a pulse transformer? They are cheap and basically do the same thing (but limited to maybe 500MHz). Main problem is: they are AC coupled, so good if the signal is symmetrical like a clock at a reasonably high frequency, bad for data. Ok, good point.
Now, a slow clock (or data) provides the typical rising/falling edge with an exponential decay. Looking at simulation data of this I wondered:
is there a (simple or at least cheap) way to recover the input signal?
This may be a stupid approach but just to get the Idea across:
As the secondary side is isolated, the negative line of the LVDS signal could be just set to a 'common mode voltae' say 1V. Now we monitor the positive line which will swing 300mV up and down the common mode voltage.
Since it is AC coupled by the transformer, we need to detect the rising and falling edges. This could be done with two comparators (or one window comparator) set at 1.1V and 0.9V and some kind of sample and hold circuit (not quite sure how but just as a concept, a flipflop maybe?). Of course this would have to be reasonably fast, if possible done by some FETs or BJTs as high-speed comparators probably are expensive or power hungry (I may be wrong here).
The output of this sample and hold could then be fed into an LVDS driver. This would of course not perform as well as the IC solution and also is not as small but it may be lower power and cheaper and more versatile.
Long story short my question is this: can an AC coupled (LVDS) signal be recovered using some kind of simple 'sample and hold' circuit or is this just too complex?
Since there are no ICs supporting this (Signal Isolation using small SMD pulse transformers) there may be a catch I do not see...

[Marco]

If the receiver doesn't have build in termination and can take a bit more input voltage you could try to use a pulse transformer with a decent winding ratio (say 4x or higher) and a low duty cycle gate drive transformer circuit. The transformer would charge the receiver input capacitance through a diode and discharge it through a PMOS transistor, the transistor acts like a cheap comparator. The termination then goes in front of the transformer.

Or just a zero DC protocol which guarantuees switching often enough to pass through the transformer any way.

[jbb]

 I have indeed passed an LVDS link through an AC coupling path (not a transformer but let’s not split hairs) and it worked OK.  Be aware that the coupling transformers are never perfect, and will degrade the signal a bit.

If you’re interested in sending multiple signals by in parallel, I’m not sure what a bank of coupling transformers will do in terms of timing skew.

Encodings like 3b/4b, 8b/10b,
64b/66b could be used for DC correctness. I quite like the 8b/10b scheme because it can pass any 8b data vale through, plus some special symbols available for link control.

[DedeHai]

I like both of your approaches.

Using a 1:4 transformer would indeed enable the possibility to just use diodes to 'recover' the signal but I think a PFET with its relatively large gate capacitance may be too slow, should be ok though for a few MHz. Not having a proper termination would be the other issue since my initial Idea was to be fully LVDS compatible on both ends i.e. using an LVDS driver and an LVDS receiver, the Idea sprung from a task at work where a LVDS FPGA output needs to be connected to an galvanically isolated device (which I solved using the aforementioned ADN4621). I was just thinking that for less stringent requirements there must be a cheaper/lower power way to do this, even if it involves some unconventional use of transistors. PFET as a simple comparator would be such a thing, I definitely need to run some spice simulations on that. If the voltage output is high enough maybe a PNP can be used somehow?

For multiple datalines (with a clock) the transformer variations and the resulting time skew would indeed be a problem for fast signals, good hint. In that case a 64b/66b encoding is probably the best way to go.
Using capacitors as isolators would solve that but they also do not offer good common mode rejection like a transformer does. A common mode choke would mitigate that issue to some extent but they may mess with the signal edges as differential impedance for signal CMC rises as well for high frequencies.

The 64b/66b (or similar) encoding limits the use to data transfer between devices that both need to support that. What if I would just want to use an SPI protocol or I2C? Over longer cables LVDS is much more reliable than using single-ended signals after all.

[MegaVolt]

Capacitor decoupling and DC-free data signal work great

[jbb]

SPI and I2C aren’t DC-free, so you’d need to have something in the middle.  You could do LVDS over the cable, then LVDS to single ended + a cheaper low-speed isolator at the far end.

[Terry Bites]

AD have a ready made solution

https://www.analog.com/en/product-category/isolated-lvds.html

[DedeHai]

I think you are all missing my point, seems I did not make it clear.

a) I know there are ready made solutions (@Terry)
b) I know there are single ended Isolators for SPI/I2C

My goal is not to find an easy, off the shelf solution but explore a novel one.

I did play around a little with LTspice starting with a simple comparator made from two transistors but ended up going full long tailed pair to make a comparator and use some feedback to make it latch. Took me a few hours of tinkering (I am no expert in transistor circuits) and I got something that kind of works, at least in simulation. It appears to be quite stable in its operating point, it keeps working even if I change the current and play with resistor values so it may well work in reality.
The output swings from 0.6-Vcc, I am running it at 1.8V. It may be better to flip the long tailed pair so it swings closer to GND, not sure it will still work that way though, maybe with some fiddling and adjusting the bias voltage. Now I need to figure out how to make the output a differential voltage once again.
I attached an image of the circuit and some simulation signal results.
The simulation results are a comparison of positive feedback and no positiv feedback to show how it recovers a slow signal. I also simulated a 1MHz clock where you can see that it already is struggeling with speed. Especially the falling edge is quite slow and I currently have no Idea how to fix that. The rising edge is also not very fast but it is much better.
The current source runs at about 5mA, at 1MHz the total RMS current is 5.6mA from the 1.8V power supply, so it runs at 10mW (with no load though).

Does anyone have any hints on how to make it faster? And how to make the output a 300mV differential signal again?

[langwadt]

why a discrete comparator? LVDS receivers are comparators

[DedeHai]

Good point. Can it be made to recover an AC signal as well? Then this would be a very good solution.

[jbb]

Maybe just add hysteresis?

[DedeHai]

Adding hysteresis could work indeed! This solution is kind of obvious in retrospective 

Using a LTC6754 LVDS output comparator to recover the signal works well. The feedback resistor value and the coupling capacitors need to be optimized for the desired minimum pulse length that can be received. The values given in the attached simulation works well down to 2ns pulses. The LTC6754 is also quite expensive though but it works.

A cheaper solution would be to use a LVDS re-driver. I could not find a LTspice simulation model of an LVDS-redriver so this solution may not work in practice using a DS90LV001 for example as the input threshold voltages of ±100mV are not quite satisfied (it is more like 50-80mV but it may still work). The higher differential input swing requires a larger hysteresis voltage so the feedback resistor needs to be lowered which results in lower speeds but it should still be able to work at least up to 50MHz.

So my proposed solution would be this:
-Pulse transformer for common-mode immunity (1:1 ethernet transformer would work well, SM453230-231N7YP for example)
-AC coupling capacitors for DC blocking on transformer primary side (if required for robustness to protect the transformer) 
-LVDS re-driver (or LVDS receiver for SE output) with proper positive feedback to set the hysteresis, DS90LV001 may work

Using the DS90LV001 the cost would be around 2$ per receiver and current is below 15mA.
The best thing about this receiver: no additional isolated power-supply required.

This method also works for a transmitter which of cours would require an isolated supply if the receiver on the other side is not isolated.