xavier60, thanks for your circuit, still figuring out how the overshoot circuit works.
To keep things simple, assume the MOSFET's Gate is always 4V and ignore diode drops.
In CV mode, the CV opamp is sinking Q4's current, controlling the Gate at 4V.
The CC opamp's output will be near its full + rail voltage.
Q2 acts as an analog switch which is off in CV mode.
When increasing PSU load current reaches the CC set threshold, because the CC opamp has no feedback path, it acts as a fast comparitor.
When its output slews down to 3.4V causing Q2's B-E junction to conduct, two things happen at the same time.
The CC opamp is now sinking Q4's current so controlling the Gate.
Because Q2 is turned on, it has effectively enabled the feedback path via C1. The CC opamp becomes a slow Miller Integrator.
Q2 is not acting as an amplifier. It could be said to be in a saturated state and because of the relatively high drive current, the B-E junction has a low dynamic resistance.
I'm finding it difficult to explain how the precharge on C1 affects the allowed current overshoot.
Edit: I had to correct some of the transistor references.