High-Z wideband buffer amp for 50 ohm CRO inputs

[GK]

I'd like to use 10:1 10M probes with my Tek 7904 500MHz oscilloscope whose wide-bandwidth vertical plugins sport 50-ohm inputs. I've elected to build a 4-channel buffer amplifier for this purpose. I'm aiming for a bandwidth of at least 250 MHz. While this is only half the bandwidth of the 7904 mainframe I feel that there is no point going any more exotic as the achievable bandwidth with 10:1 10M probes limited. After a couple of hours of head scratching this evening here is my preliminary schematic.

The unit to be constructed will have four identical channels. A channel is comprised of a 1M input termination, AC/DC coupling capacitor/switch(relay) and input protection followed by an RF JFET buffer, followed by a x2 Av op-amp based amplifier with a 50-ohm output Z for driving the scope input via a length of connecting coax. 

The ADA4899-1 output will clip/limit at about 3V peak driving the combined 100 ohm load + 300 ohm feedback resistance. This gives a full scale input of 15V peak with a 10:1 probe, though in use an upper limit of 10V peak would be considered the useful maximum. I feel that this is more than adequate as high frequency solid-state circuits seldom have ac amplitudes greater than 20Vpp.

One thing that has to be accounted for is the positive DC offset present due to the gate-source voltage of the JFET. I've elected to use a small 8-bit PIC uC (only 7 IO pins required) in combination with a four-channel 12-bit serial DAC to auto-null each channel immediately after power-on.

At first I considered using a uC with an internal ADC and MUX to measure the DC-level output of each channel during the auto-null, but that would require level-shifting to accommodate the ADCs input range, and that would have a significant degree of inaccuracy necessitating manual trimming for each channel. So as an alternative I decided to use an external MUX controlled by the uC feeding a zero-crossing comparator rather than an ADC.

The uC will be programmed with a simple successive approximation routine - each DC-null will take twelve bit-toggles with the final status for each bit determined by the output of the comparator. The end result of this is that the DC offset will be auto corrected to a couple of mV (which is more than adequate) without the need for any manual tweaking or precision components. During nulling the uC activates relay K2 to short the JFET input to ground.

I can't see anything immediately bothersome or not straight forward, though I have yet to select an suitable RF JFET. Require something with a min. Idss on the order of 10mA; currently considering the MMBFJ309 as I notice this is what Rigol use in the DS2027A, though I'd prefer something with a smaller worse-case Vgs.

Comments?




 

[tggzzz]

I'd like to use 10:1 10M probes ... I'm aiming for a bandwidth of at least 250 MHz.

Before you go too far, don't forget that there is no such thing as a 10:1 10Mohm probe.

Typically, at 250MHz their input impedance will be dominated by the tip capacitance; 15pF@250MHz => 42ohms. Use a FET or "low impedance Z0" probe. Or just a terminated 50ohm cable

[GK]

Before you go too far, don't forget that there is no such thing as a 10:1 10Mohm probe.

Typically, at 250MHz their input impedance will be dominated by the tip capacitance; 15pF@250MHz => 42ohms. Use a FET or "low impedance Z0" probe. Or just a terminated 50ohm cable

I am aware of this. I have a 50-ohm terminated cable whenever I use the vertical channel inputs of 7904 directly. This unit is to serve a different purpose. Perhaps I should have written that I intend to give my 7904 standard 1M-ohm inputs, for convenience.

Additionally I have removed my "edit" note and I now have the correct schematics up. Who needs to go to bed on a Friday night anyhow?
 

[GK]

Ugh... Forget about the ADA4899-1. Nice bandwidth but its slew rate is lousy. Will have to look for something much better.

[GK]

.... more issues......

Assuming that the source of the JFET sees a total load capacitance of 10pF. At 100MHz 1Vpeak this will require a peak drive current of a tad over 6mA. That is near the bias current of the JFET and will result in massive distortion.

A practical limit would be 100mV peak signal amplitude at the JFET. Anyone know what signal amplitude the Rigol front-end runs on its JFET buffers?

This would then require a frequency-compensated 10:1 attenuator on the input side of the JFET to maintain the desired input signal handling capacity.
However 10 times less signal amplitude at the output means that I no longer have slew-rate limitation issues with the ADA4899-1. At 200mV peak output (double to account for the 6dB loss of driving the terminated 50 ohm scope inputs) the specified 310V/uS slew rate will accommodate a power bandwidth of 310e6/(2pi*200mV) =  247MHz..... although that is just adequate for the bandwidth target.... I would prefer that the full power bandwidth computed from the slew rate limitation be twice (for a decent safety margin) the achieved small-signal bandwidth.   

However the additional 20dB attenuation turns a 10:1 probe into a 100:1 probe, limiting me to only 1V per division maximum sensitivity (scope vertical plug-in does 10mV/div). Id need to make the input attenuator switchable to get this back to a more useful 100mV/div.

 

[lukier]

Interesting project, maybe it could be adapted to work like TCA-1MEG for those using TDS7404 and other TekConnect input scopes (those TCA-1MEG are pretty expensive). Also spectrum analyzers that have 50 Ohm inputs. 

[Someone]

With so little gain in that front end you can get the bandwidth and swing from opamps alone. Here is is a much higher gain design doing the same impedance conversion:
https://www.eevblog.com/forum/projects/diy-100mhz-differential-probe/msg938343/#msg938343

[T3sl4co1l]

BF862 is quite popular.  2N5486 might be okay too, but the LF noise is uncontrolled and may be visibly poor.

Speaking of, there's a diplexer arrangement that's popular for lower noise and wide offset; I think Rigol uses it too?  (AC couple input to JFET gate; 100M from JFET gate to op-amp; op-amp servos JFET to keep DC(output) = DC(input).)  Have you considered this, or just figure it's not worth it?

(You'll probably want attenuators too, but I suppose that's just not shown.)

Tim

[Alex Eisenhut]

http://w140.com/tekwiki/wiki/282

[GK]

With so little gain in that front end you can get the bandwidth and swing from opamps alone. Here is is a much higher gain design doing the same impedance conversion:
https://www.eevblog.com/forum/projects/diy-100mhz-differential-probe/msg938343/#msg938343

I'm going to need something with at least double the slew rate of the ADA4899-1, so probably a CFA. These high speed (>600MHz GBWP) op-amps have high input bias currents that don't make for convenient termination into 1M. The datasheet for the THS306(1/2) you used specifies a typical input bias current for the non-inverting input of +/-6 A !. Though this is obviously a typo and the unit should be uA. That's +/-6V DC offset when terminated into 1M. I also don't think that many op-amps with =>600MHz GBWP would be very stable with a source termination of 1M||9M. I think the JFET buffer has to stay.
 

[GK]

OK, reviewing the design spec..............

The unit will be built just as shown in the preliminary schematic, with the exception of a better op-amp substituted for the ADA4899-1 and a relay-switched 20dB attenuator added to the input circuit. This is as complicated as I'm willing to make the design, which is simply meant to be a moderately convenient probe adapter and not a full blown analogue CRO front-end.

[Someone]

With so little gain in that front end you can get the bandwidth and swing from opamps alone. Here is is a much higher gain design doing the same impedance conversion:
https://www.eevblog.com/forum/projects/diy-100mhz-differential-probe/msg938343/#msg938343

I'm going to need something with at least double the slew rate of the ADA4899-1, so probably a CFA. These high speed (>600MHz GBWP) op-amps have high input bias currents that don't make for convenient termination into 1M. The datasheet for the THS306(1/2) you used specifies a typical input bias current for the non-inverting input of +/-6 A !. Though this is obviously a typo and the unit should be uA. That's +/-6V DC offset when terminated into 1M. I also don't think that many op-amps with =>600MHz GBWP would be very stable with a source termination of 1M||9M. I think the JFET buffer has to stay.

The DC path is through the precision amplifier so you do not see the bias current of the CFA input pins, and for your application the entire loop could have a DC servo to eliminate the micro controller and DAC/ADC you propose. Just another way of getting the impedance transform, let us know how you go with your plans.

[GK]

A DC servo is out of the question as that would give the unit a high-pass frequency response; ie a frequency response that does not extend to DC (Note that in the Rigol front-end the LF amplifier is not a DC servo)

Yes another way of building the front end is with a JFET low-bandwidth op-amp bypassed for HF, but that has other drawbacks and isn't any simpler (it *still* requires a high input impedance buffer/amplifier for the combined LF/HF path).


In my  proposed circuit the only active component loading the 1M input network is the JFET. This "minimalism" will help in keeping the parallel (shunt) input capacitance to a minimum, which is preferable as I'd like to unit to be compatible with low-c, high-bandwidth probes.
 

[bson]

Ugh... Forget about the ADA4899-1. Nice bandwidth but its slew rate is lousy. Will have to look for something much better.

How about the BUF602?

[GK]

Ugh... Forget about the ADA4899-1. Nice bandwidth but its slew rate is lousy. Will have to look for something much better.

How about the BUF602?

Unfortunately I need an op-amp configuration as I require a gain of 2 and means of shifting the DC offset. AD8001 looks like it will do the job.
 

[GK]

This is what the design currently looks like. Relay K1 is used the switch the 20dB input attenuator in and out. I'm aiming for an input shunt capacitance of 18pF. This will be layout dependent to some degree, so it will be padded up if required with the capacitor labeled "S.O.T". Trimmer CV1 is used to equalize the input capacitance when the attenuator is switched in, so that the probe calibration holds. CV2 is used to adjust the flatness of the frequency compensation.

The 4-channel 12-bit DAC for the micro-controlled offset nulling will be Burr Brown (now TI) part # DAC7614.



EDIT: Oops, I omitted the AC/DC coupling capacitor/relay-switch immediately after the input BNC.

[T3sl4co1l]

Hm, should K2 not be SPDT so it doesn't short the input?

What's the bias below the JFET doing?  It just appears to be a double cascode on top of 680+68 ohms, so the dual and the diode aren't doing anything..

Also something mumbled about superfluous bypass caps, but whatever.

Tim

[joeqsmith]

Have you looked at some of the newer op-amps?    I wanted to do something similar.  DC-???  1M input 50 output.  +/-30V input w/ protection.  Video showing a TI eval board.   I played with a couple of different ones.

[Cerebus]

May I recommend a read of the article "Signal Conditioning in Oscilloscopes and the Spirit of Invention" by Steve Roach of Tektronix. Basically it's a high level tutorial on designing 1M scope inputs from someone who does it for a living - highly recommended. It'll give you some ideas about FETs but it might cause you to rethink some of how you're planning to do this.

[GK]

Hm, should K2 not be SPDT so it doesn't short the input?

What's the bias below the JFET doing?  It just appears to be a double cascode on top of 680+68 ohms, so the dual and the diode aren't doing anything..

Also something mumbled about superfluous bypass caps, but whatever.

Tim

What? As previously explained K2 is for shorting input under uC control while auto-zeroing of the output takes place.

Routing the input through another set of relay contacts will only add to the input capacitance and there is no need to do so in any case. When K2 is activated there is no danger from input currents flowing in via the 9M series resistance of a 10:1 probe or the few puff of compensation capacitance in parallel with it.

The current source is designed to be highly stable to prevent DC drift. The diode-connected transistor of the dual temperature compensates the other acting as the current source - thus the voltage across the 680 + 68 ohm remains highly stable. The -10V rail will voltage-track the -5V rail with temperature as the (SMD LM337L) regulator for the -10V rail will use the -5V rail as a "ground" reference. 

The current source is cascoded because the dual BJT has high collector C and capacitive loading on the JFET source has to be kept as low as practical. So the current source is cascoded with a RF BJT. Not very complicated or difficult to understand, IMO.

[GK]

May I recommend a read of the article "Signal Conditioning in Oscilloscopes and the Spirit of Invention" by Steve Roach of Tektronix. Basically it's a high level tutorial on designing 1M scope inputs from someone who does it for a living - highly recommended. It'll give you some ideas about FETs but it might cause you to rethink some of how you're planning to do this.

I have the article and there is nothing wrong with the way I have implemented the 1M input network.

Thanks.

[GK]

BF862 is quite popular.  2N5486 might be okay too, but the LF noise is uncontrolled and may be visibly poor.

The BF862, despite being marketed for AM radio front-ends, is popular in audio (phono preamps, etc) because it has very low voltage noise (<1nV typical) and a very low (for an RF JFET) 1/f corner (<1kHz). It also has high junction capacitances compared to typical VHF/UHF JFETs, ruling it out as a contender.

The higher "LF noise" of typical VHF/UHF JFETs isn't an issue anyway when the input source is 1M||18pF.

[Cerebus]

May I recommend a read of the article "Signal Conditioning in Oscilloscopes and the Spirit of Invention" by Steve Roach of Tektronix. Basically it's a high level tutorial on designing 1M scope inputs from someone who does it for a living - highly recommended. It'll give you some ideas about FETs but it might cause you to rethink some of how you're planning to do this.

I have the article and there is nothing wrong with the way I have implemented the 1M input network.

I didn't say there was, just that the article might make you rethink - because there's such a lot of very useful info in it. Why so snippy?

[GK]

Have you looked at some of the newer op-amps?    I wanted to do something similar.  DC-???  1M input 50 output.  +/-30V input w/ protection.  Video showing a TI eval board.   I played with a couple of different ones.

I can't watch the vid (internet connection limitations), but I think the op-amp approach is practical if you can live with a high ratio of fixed attenuation at the input. That way the impedance "seen" by op-amp can be kept low enough to prevent instability. A 1M input termination for an op-amp with a GBWP approaching 1GHz though just doesn't seem to be conductive to stable operation. In applications such as video line drivers (gain +2), where the datasheets actually go into layout and stability requirements for these kind of op-amps, it's typically recommended to terminate the input with the low impedance (75 ohms) as close as practical to the op-amp input.

It would be nice if it were so simple, but I have yet to see a commercial DSO front-end design of several hundred MHz bandwidth in which the 1M input is successfully buffered with a low-input-Ib op-amp voltage follower.

Though if anyone can present an example I'm happy to be proven wrong.

[T3sl4co1l]

What? As previously explained K2 is for shorting input under uC control while auto-zeroing of the output takes place.

Oh right.. I should pay attention more

The BF862, despite being marketed for AM radio front-ends, is popular in audio (phono preamps, etc) because it has very low voltage noise (<1nV typical) and a very low (for an RF JFET) 1/f corner (<1kHz). It also has high junction capacitances compared to typical VHF/UHF JFETs, ruling it out as a contender.

Not necessarily.  Phil Hobbs is quite fond of them in photodiode TIAs and esoterica.  The capacitances go down because it's a follower; they go down further still if you add bootstrapping, which isn't too big of a deal (a BJT follower into the drain, with a resistor divider for bias, and a cap coupled to the source, is the simplest starting point).

After killing off most of the capacitance, the high transconductance is a big payoff.

Tim