High Voltage Differential probe design for review

[cjk2]

Here is a design for a 100:1 HV probe up for review. I intend to make this on a simple 2 layer PCB and put it in an aluminum box. Power will be a 15V walwart or bench supply.

Perhaps someone that has used a rail splitter before can comment on any problems this design has?

I may change to a 200:1 ratio or lower the HV divider impedance if I encounter problems with high frequency response.

C7 and C15 are to be used if more capacitance is needed to compensate the probe, possibly due to needing to make all the 1pF caps bigger for some reason.

Anyone care to give me a design review?

[diegosfb]

Looks very good

Remember it is recommended to have small ceramic caps between the power rails of each opamp to minimize the noise.

Let us know how it goes once it is constructed.

Best Regards,

[Marco]

Why make a instrumentation amplifier out of discrete opamps?

Have you seen the Elektor design? There I can see some reason for the discrete opamps (it also uses a trick to get better CMRR you might want to crib if you stick with it).

[tggzzz]

It is probably worth running a spice model of the passive components between the instrumentation amp and the probes - making sure you add in some plausible values for parasitic inductance and capacitance. See the component datasheets and PCB design tutorials for suitable values.

If you are dealing with high voltages, the protection afforded by having an aluminium case is dependent on the quality the way it is earthed. In a non-ideal world that could be compromised in several different ways. You may like to consider going part way towrds double insulation, by having an insulating plastic box with the metal box inside it.

[free_electron]

this is not a differential probe as it has no common mode rejection ! the coupling between the first two opamps is missing ...

[macboy]

this is not a differential probe as it has no common mode rejection ! the coupling between the first two opamps is missing ...

You don't need coupling between the first two op-amps for common mode rejection. In a 'typical' differential instrumentation amplifier, where the first stage op-amps have gain, the coupling between the two first-stage amps ensures unity gain for common mode signals, but programmed gain for other signals. So you aren't really rejecting common mode signals in the first stage so much as simply not amplifying them. Then the following differential amp takes care of rejecting (most of) what is lest of the common mode. In this case, the first stage is unity gain, so no benefit is to be had from coupling the feedback together.

[T3sl4co1l]

Looks good, but I'd worry about "hook" (slight rise/droop at time constants other than the dominant compensation TC).  Curious how good the CMRR will be at higher frequencies.

I made a 1000:1 sensor with this sort of design; I used 4.7pF capacitors in the divider chain (I think with the same number of resistors, too), which of course would require a whopping 1nF to compensate, so I didn't compensate it by variable capacitance, I did it by variable resistance.  This varies DC instead of AC gain, allowing compensation; a second trimmer sets DC+AC total gain, allowing calibration as well.

When you do the layout, mind to keep copper (including ground plane) well away from the dividers!  This also serves as isolation/creepage/clearance (since 100x at this voltage range is going to be, what, CAT II range I suppose?).  The rest of the circuit should have ground plane, stitched top and bottom if it's two layer.

Tim

[cjk2]

"Why make a instrumentation amplifier out of discrete opamps?"
Can you find one that has bandwidth out to 50MHz or so? I would love to improve the design but I have not found any.

"Have you seen the Elektor design?"
I had not until you mentioned it. This is an interesting design but much slower.

"You don't need coupling between the first two op-amps for common mode rejection."
Right, this is what I though and simulation has confirmed.

Attached are some simulation results as well as my revised design.

CMRR is 28dB worst case and much better for lower frequencies. I wonder if sticking a common mode choke (ferrite core) on both probe leads would help improve CMRR.

I will have to terminate on the scope end in 50 Ohms I suspect and suffer the 6dB loss.

[Mechatrommer]

this is not a differential probe as it has no common mode rejection ! the coupling between the first two opamps is missing ...

You don't need coupling between the first two op-amps for common mode rejection. In a 'typical' differential instrumentation amplifier, where the first stage op-amps have gain, the coupling between the two first-stage amps ensures unity gain for common mode signals, but programmed gain for other signals. So you aren't really rejecting common mode signals in the first stage so much as simply not amplifying them. Then the following differential amp takes care of rejecting (most of) what is lest of the common mode. In this case, the first stage is unity gain, so no benefit is to be had from coupling the feedback together.

read AoE 2nd Ed page 421-426... these sharp people suggesting it as the last improvement man can make for reasons (experience maybe?) wanna reinvent the wheel? go ahead we have no objection.

1) you probably wont need 5 gangs of 1M+1pF in each input. maybe only 2 gangs of 2.5M+?pF
2) dont put ground plane at the bottom of input voltage divider. that was a "reinventing the wheel" mistake i made during my ver1 pcb design. i figured out later... everybody are not doing it. need to prove that thesis in the ver2 pcb later in the unknown future.
3) what bandwidth are you aiming? anything below 10MHz is pretty much practical for hobby build in practical time frame with practical CMRR requirement imho. i suggest make a literature study before wasting money.

[image]
ltspice CMRR 1.png (17.58 kB, 1473x591 - viewed 5 times.
[/image]
if only ltspice is true (100dB? CMRR), i want one! you'll smoke the hell out most of hi-volt diff probe out there including agilent 1141a+2145 100X setup (only 52dB). but alas imho this is the arena where many spices failed... ymmv. note: its not the spices sw that failed, its the components model you are using that are. and please do keep in mind even a short copper trace is a "component".

[cjk2]

Here is a draft of my layout. I am aiming for 50MHz but will not be upset if I get 10MHz only.

[Richard Head]

In the interest of better CMRR would it not be better to increase the gain of the differential amp stage? As it is there is no difference between the common mode and differential mode gain.

[Dago]

I designed a high-voltage (designed for 500 Vrms) differential probe last year: http://www.dgkelectronics.com/storage/electronics/differential_probe/differential_probe.pdf http://www.dgkelectronics.com/storage/electronics/differential_probe/layout_screenshot.png

I built one prototype but I have quite a bit of DC offset on the output due to the opamp input current. When I get around to it I'm going to swap the voltage divider resistor values to smaller ones.

I got it tuned up pretty well in the simulation (-3 dB bandwidth of ~150 MHz, I'd be very happy if it actually did 50): http://www.dgkelectronics.com/storage/electronics/differential_probe/lt1818_tuned.png Finding a suitable op-amp was very challenging. Even the LT1819/1818 is not very optimal because of the high input current (I haven't managed to find a better one though).

I haven't gotten around to measuring the CMRR (need to fix the offset issue first). It seems that the opamp SPICE models I used are somehow simplified in terms of modeling the CMRR and the simulation does not seem to change much even if I swap the opamps to some totally different ones. Need to look in to that.

[Marco]

Can you find one that has bandwidth out to 50MHz or so? I would love to improve the design but I have not found any.

AD8129/AD8130?

[cjk2]

Dago:

Thanks for sharing your design. I changed to the LT1819 after looking at its specs. It seems better than the opamp I had selected. They are pin compatible so I may well build both and see which one performs best.

Marco:

The AD8130 looked interesting at first but does not have much better CMRR than my solution appears to. I think this part could be used and may be superior in some regards but may have trouble driving 100 ohms as I will need here. The AD8130 plus a power driver could work well though and I may try it at some later time.


Attached is my latest schematic and the board I am about to send off.

[Jay_Diddy_B]

Hi,

I would suggest replacing the 1pF capacitors that you have in parallel with the input resistors with 20pF capacitors. You then have to make a similar adjustment to the capacitor at the bottom of the divider.

If you use 1pF capacitors I believe that you will have difficulty getting a flat frequency response because of stray capacitance. You can add some stray capacitance to your LTspice model like this:



I just added some 0.1pF stray capacitance, I am not sure what the value will be, but it does not take very much.

The Tektronix P5205A has 5M Ohm // with 4pF per side as shown here:

http://www.tek.com/datasheet/differential-probe-high-voltage/tmdp0200-thdp0200-thdp0100-p5200a-p5202a-p5205a-p5210a

There are some pictures of the P5205A in this thread:

https://www.eevblog.com/forum/testgear/tek-p5205-hv-differeantial-probe-teardown-btw-what-are-the-red-and-brown-wires/

If I look carefully at the picture, it looks like they have 2 x2.2pf in series in each side, this means that the input capacitance is lower than the spec, or there is some other capacitance somewhere else.

The results from the LTspice model are:






I have attached a zipfile with the model.

Regards,

Jay_Diddy_B

[tggzzz]

The AD8130 looked interesting at first but does not have much better CMRR than my solution appears to.

Have you done anything to determine the major contributors to CMRR?

It might be worth doing a monte-carlo analysis on the components in the voltage divider, especially using realistic tolerances for the resistors and capacitors when placed on a slightly grubby circuit board. My gut feel, without analysis, is those effects will dominate the opamp's non-idealities.

[Jay_Diddy_B]

Hi group,

Here is a Monte Carlo model for the divider. I assumed that the capacitor in the divider have 5% tolerance and the stray capacitance is 20%. I have set these using parameters so they are easy to change.

Here is the model:




The result for 1pF capacitors:




And for 20pF capacitors:



I have attached the LTspice model so that you can play with the parameters.

Regards,

Jay_Diddy_B

[edavid]

How do you plan to implement gain, offset, and CMRR trim? (DC and AC for gain and CMRR)

[cjk2]

Jay:

Thanks for your work in simulating the input stage and pointing out the problems with parasitics. I have revised my design to take the effects you discovered into account.


edavid: You asked "How do you plan to implement gain, offset, and CMRR trim? (DC and AC for gain and CMRR)"

Gain: You get what you get with 0.1% resistors and whatever offset errors and input currents the opamps have. I will be happy if i get to 2% or less gain error but I will deal with whatever I end up with. The terminator on the end of the 50 ohm cable (if I use one) will introduce error anyway (1-5%?).

Offset: You get what you get. I can't imagine there would be too much offset error but I have certainly been wrong before. I am not worried about an offset that is a few percent of full scale only. If it is 20% of full scale then I will probably redesign the board with trimmers or choose different opamps. Where would the offset come from anyway? The two input amps will have somewhat close bias currents I suspect so they should not generate much differential offset. The difference amp uses lowish impedance feedback parts so the input current there won't matter much. The only other source of error I can think of is then voltage offset error of the amps which for my parts is about 1mV which will translate to 500mV of input referenced offset or like 0.1% of full scale offset error. Am I missing some other effect that will cause more offset?

CMRR: At DC you get what you get with 0.1% resistors. For AC the CMRR is tuned with the trimmer caps on the input stage. The CMRR will get worse as frequency goes up so it makes sense to worry more about that than some small low frequency common mode leakage.

[Jay_Diddy_B]

Hi group,

Here is some more Monte Carlo analysis of the complete circuit.

Normal Mode Gain

In the first model I have configured the circuit to measure the normal mode (Differential) gain:



The results show a -3dB point at 100MHz




Common Mode Gain

In the second model I have moved the source so that we can measure common mode gain:



Here are the results of an ac sweep:



And the transient response, the common mode input is a 500V step:



Gate Drive Example

In this model I have two inputs, I have a 10V p-p input combined with a 100V p-p common mode signal This is would be typical of looking at a gate drive signal on a high side MOSFET switching at 50 kHz.



You can see the wide range of results from this test.



I have attached the LTspice models in a zipfile.

Regards,

Jay_Diddy_B

[tggzzz]

You may find some points in this article relevant, since it is the experiences building a homebrew "1GHz differential active probe"
https://xellers.wordpress.com/2014/09/28/diy-active-differential-probe-characterization-round-2/

[Jay_Diddy_B]

Hi Group,

I spent a little time in the lab with two commercial H.V. Differential probes. One is a SI-9000A, this is made by Saphire Instruments and is available re-branded from a number of sources. The other is a Tektronix p5200. Both are 50x/500x probes.  All these measurements were made in the 500x setting. The measurements were taken with a 1GHz TDS784a. With both these probes the scope is used in the 1M Ohm mode.


The 100V signal was made by a Tektronix CG5001 scope calibration generator. The unit was used in the 'EDGE' mode. Risetime is less than 100ns, Abberations less than 2%.

In the all the picture the purple trace is the signal measured with a Tek P6139A 500 MHz passive probe.

SI-9000A

Differential Mode



Common Mode - Both leads connected to the signal



Tek P5200

Differential Mode



Common Mode - Both leads connected to the signal



Here is the specifications of the Tektronix probe:



Regards,

Jay_Diddy_B

[Jay_Diddy_B]

Hi,

I did a few measurements on these probes with a HP3577A Vector Network Analyzer.

SI-9000A

This is the differential mode gain, a x500 probe should measure -54 dB



The common mode gain is measured by putting the same signal on both leads. The lower the gain is better. It is a measure of the probes ability to reject common mode signals.




Tektronix P5200

Differential Gain



Common Mode Gain



You can see that neither of these probes has particularly spectacular performance.

Regards,

Jay_Diddy_B

[Circlotron]

In the circuit in the first post, C6 will see twice the slew rate than C14 and they are both the same value. What's more, the signal that gets filtered by C14 also gets filtered by C6 but not vice versa. Will this not cause problems at HF?

[Jay_Diddy_B]

In the circuit in the first post, C6 will see twice the slew rate than C14 and they are both the same value. What's more, the signal that gets filtered by C14 also gets filtered by C6 but not vice versa. Will this not cause problems at HF?

I can build a model of that part of the OP's circuit and measure the gains. I can measure gain from the inverting input, non-inverting and the common mode gain.



The amplitude response from the inverting and non-inverting inputs is the same. There is (a desirable) difference in the phase response.




The common mode gain (rejection) is good at low frequencies but is reduced at higher frequencies. This comes from the LT1807.



Regards,

Jay_Diddy_B