Using the bubble read command in poll mode, I can not figure out why my bubble memory board
hackaday.io is letting me read past the initial FIFO load. I can write to the bubble and the 7220 FIFO status flag seems to be working fine (or possibly it is writing faster than I am filling). I can also read the boot loop and the boot loop register but those fit in the FIFO so the problem does not show up. The problem only seems to crop up when reading a page from the bubble and then only past the first FIFO load. Operating in polling mode with enable byte of 0x00, and the first FIFO load can be read without problems. Up to about byte 24, the status stays 81H as expected but a few bytes later the data turns to 00H as if reading past the FIFO but the status byte is still 81H. a few more byte reads and the status byte flips directly to 91H but the FIFO ready flag never goes to low as expected. After the full page read, the busy goes low and the status byte is now 30H so it is indicating a failed opcode and timing error as expected for a read past the FIFO load.
This has tied me up for most of the day. Anyone familiar enough to with the intel 7110 and 7220 bubble system to be able to give advice?
Thanks
Craig