Help requested - coil driver reverse engineering

[radar_macgyver]

I have a few circuit boards that a former colleague gave me that are meant to drive the magnetization coils of a latching circulator microwave module. He mentioned that the drivers are dead since someone had miswired a cable harness and applied 28V to an input that expected logic-level signals. The latching circulators are rather expensive, and the company that made them is no longer around. I figured I'd have a go at reverse engineering how they work, with the aim of making a replacement. I don't have much experience with power electronics, so I could use some help. The intended use is in a W-band (95 GHz) radar system in the duplexer assembly, separating the ~1 kW transmitter from the receiver.

The damaged drivers are in a potted module. Luckily, they used a urethane potting compound, so it was possible to dig out the compound and expose the PCB. Much of it is fairly straightforward to understand, and I was able to come up with the attached schematic. The real puzzler was what appears to be an ASIC. Most of the ASIC pins are commoned together, and the arrangement looked like an H-bridge. I used a component tester which identified that the chip contains four MOSFETs, two P-channel and two N-channel. Strangely, the N-channel FETs were identified as not having a body diode. There's also a mystery fourth terminal on each FET, which measures as a diode to the source of each FET. This fourth terminal from the N-channel devices is then used to drive the P-channel halves of the bridge through an external RC network and a pullup to +28V.

Separately, I had measured the latching circulator coil in an L-R network and measured the cutoff frequency. From this, the coil inductance is about 375 nH. The DCR is too low for me to reliably measure.

I was also fortunate to have one working module and its associated latching circulator. I fed it a drive signal typical of its end-use (5 kHz rep rate, 3 us pulse width) and observed the voltage and current waveforms through the coil. The attached scope screenshot channel 3 is the input drive signal (inverted). Channel 4 is the current pulse, measured using a Tek P6022 current probe. I don't have a differential probe, so I used channels 1 and 2 to measure the coil voltages, and did a math subtract. There's rather severe ringing but enough to get the general idea.

There are a few things about the measurement I can't quite figure out.

• Why is the voltage across the coil only about 10V, rather than the expected ~28V?
• Those fall times are very short - how are they able to achieve it?

Going back to the schematic, the original design uses a rather strange method to sense the current on the high-side of the +28V rail. One of the line receivers is cleverly used as a comparator, and generates a cutoff signal which stops the bridge from dumping more current into the coil. The RC networks and the NOR gates are used to generate a drive signal whose maximum on-time is limited by the RC network to about 3 us (they depend on the current sense pulse to cut off the drive signal). The same current sense signal also triggers U2B to produce a 'BITE' signal that's used by higher-level control logic to positively determine that the latching circulator is in the right state. If the BITE signal is not received, then the transmitter is not enabled to transmit, saving the receiver from instant death.

I tried using LTspice to simulate several different versions of the driver. With the as-is version of the schematic, the fall times were too long (600-700 ns). With an additional gate driver using PNP/NPN BJTs for the P-channel and a separate level shifter, I could get the fall times similar to the measured values with some experimentation. I've attached this version of the driver here.

• Any ideas what the ASIC's fourth pin does?
• Can the fall time be reduced by not fully turning on the P-channel FETs? I wonder if this ties in to my measurement of ~10V across the coil when it's turned on.
• It seems like selecting FETs with a low gate capacitance is a higher priority than ones with low on resistance for this application - is that a valid assumption? If so, any suggestions on devices?
• I tried using an LTC4444-5 gate driver and NMOS FETs, but again ran into long fall times. Additionally, the bootstrap voltage needed to drive the top FET does not build up in time for the first pulse in a sequence, which won't work in the intended application (potential damage to receiver). Is there a better way to do this with a gate driver?
• How does the current sensor work? I removed the diode from the board and measured a reverse breakdown of ~6.8V, forward drop of 0.6V so it's a Si diode, but the packaging is a glass MELF.

Thanks!

[slugrustle]

Much of it is fairly straightforward to understand, and I was able to come up with the attached schematic.

This is great stuff.

Strangely, the N-channel FETs were identified as not having a body diode.

How are you making this measurement?

There's also a mystery fourth terminal on each FET, which measures as a diode to the source of each FET.

That's not what the schematic shows.  I read this as saying D2 and D3 are connected to "the source of each FET", which is ambiguous.  Your schematic shows the cathodes of D2 and D3 as connecting to the drains of Q7+Q9 and Q6+Q8, respectively.

This fourth terminal from the N-channel devices is then used to drive the P-channel halves of the bridge through an external RC network and a pullup to +28V.

It's a very clever circuit from a time when gate driver ICs in high side or half bridge configurations must have been uncommon and/or expensive.  As long as there is some dead time in the N-MOSFET gate drive pulses (Q8 gate voltage is 0V for a brief time before Q9 gate voltage goes to 5V and vice versa), shoot through should be avoided.

Separately, I had measured the latching circulator coil in an L-R network and measured the cutoff frequency. From this, the coil inductance is about 375 nH. The DCR is too low for me to reliably measure.

This strikes me as very low inductance for a relay, but I have zero experience with "latching circulator coil"s in RF circuits.

I was also fortunate to have one working module and its associated latching circulator. I fed it a drive signal typical of its end-use (5 kHz rep rate, 3 us pulse width) and observed the voltage and current waveforms through the coil. The attached scope screenshot channel 3 is the input drive signal (inverted). Channel 4 is the current pulse, measured using a Tek P6022 current probe.

Please be a lot more specific about what you mean by "the input drive signal" and "the current pulse".  I'm assuming "the input drive signal" is somehow EN_P minus EN_N despite the lack of a differential voltage probe, and that "the current pulse" is the current through the coil.  Where are you probing the coil current?  Is your current clamp measuring the current through C10 or not?

There are a few things about the measurement I can't quite figure out.
   1. Why is the voltage across the coil only about 10V, rather than the expected ~28V?

This is curious.  For starters, please probe your +28V rail.  If you're really throwing 12A or more into this coil, there will be significant voltage drop across R5 || R6, depressing the voltage on the +28V rail and therefore the voltage across the coil.  Additionally, the gate drive voltage on Q6 and Q7 is about half of the voltage on +28V after subtracting a diode drop.  If the voltage on +28V is depressed too far, Q6 and Q7 will start to turn off slightly or at least enter their linear region.

Those fall times are very short - how are they able to achieve it?

What do you mean by "those fall times"?  Fall times of what?

Going back to the schematic, the original design uses a rather strange method to sense the current on the high-side of the +28V rail. One of the line receivers is cleverly used as a comparator, and generates a cutoff signal which stops the bridge from dumping more current into the coil. The RC networks and the NOR gates are used to generate a drive signal whose maximum on-time is limited by the RC network to about 3 us (they depend on the current sense pulse to cut off the drive signal). The same current sense signal also triggers U2B to produce a 'BITE' signal that's used by higher-level control logic to positively determine that the latching circulator is in the right state. If the BITE signal is not received, then the transmitter is not enabled to transmit, saving the receiver from instant death.

This is a very typical overcurrent detector for an old school analog design.  U3 makes 2.495V nominal.  Ignore the input current into U1C pin 9 (voltage drop across R11 = 0V) and add the ~120mV required for U1C to change its output state; this gives 2.615V across R9 to get U1C's output to go high, which in turn requires 51.3mA collector current from Q1.  Assume Q1 has a gain of 60; you'll need 855µA base current and 52.1mA emitter current.  Assume VBE = 0.8V when Q1 is on in this condition.  That gives 52.1mA * 26Ω + 0.8V = 2.15V across R7 to turn on Q1.  The total current through R5 || R6 to turn on Q1 is therefore 52.1mA + 2.15V / 140Ω = 67.5mA.

R7 ensures that Q1 turns off once the current decays, and C3 helps prevent Q1 from turning on too quickly.  The voltage drop across R7 seems quite high unless D1 is either backwards in the schematic or a very special diode (Vf > 2.2V with margin), since D1 can't clamp the voltage across Q1 Vbe and R8, otherwise Q1 never turns on.  Based on what you write later, D1 is a normal Zener diode so I think it's backwards in the schematic.  Also, are you sure you have the right values for R7 and R8?

I tried using LTspice to simulate several different versions of the driver. With the as-is version of the schematic, the fall times were too long (600-700 ns). With an additional gate driver using PNP/NPN BJTs for the P-channel and a separate level shifter, I could get the fall times similar to the measured values with some experimentation. I've attached this version of the driver here.

Please be much more specific regarding what fall times you're talking about.  Are your MOSFET models in LTspice good models for the MOSFETs in the ASIC?

1. Any ideas what the ASIC's fourth pin does?

I thought it was the "fourth pin" on each MOSFET inside the ASIC; you haven't listed ASIC pin numbers in the schematic.  As drawn, D2 and D3 are simply diode connections to the two switch nodes in the full bridge inside the ASIC and constitute a clever means to create a high side gate drive.

2. Can the fall time be reduced by not fully turning on the P-channel FETs? I wonder if this ties in to my measurement of ~10V across the coil when it's turned on.

"The fall time." The fall time of what?  Modern MOSFETs are only made to be hard off or hard on.  They are thermally unstable operating in the linear region where they're partially turned on.  The standard practice for H-bridges is to drive the MOSFET gates fast and hard.  The 10V across the coil is super weird.  Check your measurement setup, try probing extra locations to see where the voltage drop might be occurring (I suspect R5 || R6, but who knows where else it could be), and check the voltage on +28V itself.

3. It seems like selecting FETs with a low gate capacitance is a higher priority than ones with low on resistance for this application - is that a valid assumption? If so, any suggestions on devices?

In power electronics, the MOSFETs are typically selected for sufficiently low on resistance to meet thermal requirements, and then people use gate driver ICs that can output very high peak currents to turn on the MOSFETs quickly.

4. I tried using an LTC4444-5 gate driver and NMOS FETs, but again ran into long fall times. Additionally, the bootstrap voltage needed to drive the top FET does not build up in time for the first pulse in a sequence, which won't work in the intended application (potential damage to receiver). Is there a better way to do this with a gate driver?

The issue with bootstrapped gate drivers like this is you need to have the low side MOSFET turn on first to charge up the capacitor that powers the high side gate driver.  When the high side MOSFET is on, all the gate driver power is coming from that external capacitor between the BOOST and TS pins.  Your options are to either make sure that happens by changing the input signals or the circuitry somehow or to create a voltage rail with ~10V above your +28V rail (with a boost converter or charge pump) to supply power to an isolated gate driver for a high side N-MOSFET or to stick with P-MOSFETs on the high side.  There should be gate driver ICs made for a P-MOS + N-MOS configuration.  You might also be able to find a half bridge gate drive IC that incorporates its own boost converter or charge pump to use all N-MOSFETs.

5. How does the current sensor work? I removed the diode from the board and measured a reverse breakdown of ~6.8V, forward drop of 0.6V so it's a Si diode, but the packaging is a glass MELF.

See the discourse above, lol.  A 6.8V Zener diode in a glass MELF package is not unusual for a circuit of the vintage that the other components and the design indicate.

[radar_macgyver]

Thanks slugrustle for the reply, I really appreciate it. Sorry, in hindsight I was quite sloppy with my terminology.

Please be a lot more specific about what you mean by "the input drive signal" and "the current pulse".  I'm assuming "the input drive signal" is somehow EN_P minus EN_N despite the lack of a differential voltage probe, and that "the current pulse" is the current through the coil.  Where are you probing the coil current?  Is your current clamp measuring the current through C10 or not?

Please sub 'fall time of the coil current' for all references to 'fall time' above. I'm measuring the coil current with a current probe (P6022 in 10mA/V mode, 120 MHz bandwidth, with a Siglent SDS2104X 100 MHz scope), and can't probe the 28V rail since the working unit is a potted module that I'm unwilling to disassemble (given these are quite expensive assemblies). The current measurement it only though the coil (C10/R18 are on the driver PCB). The input signal (trace 3 on the scope shot) is the TTL input on EN_N. I'm feeding EN_P and EN_N from a 75158 differential line driver, which is in turn fed from a function generator. EN_N instead of EN_P since that was easier to probe...

Strangely, the N-channel FETs were identified as not having a body diode.

How are you making this measurement?

I was able to desolder the ASIC (I suppose it's more correctly a hybrid, perhaps an MCM) and hook up the leads to an inexpensive component tester, similar to this:
https://www.amazon.com/HiLetgo-Multifunctional-Capacitor-component-Backlight/dp/B01MYU0QI3/

I often use it as a first-pass to figure out an unknown device. When testing MOSFETs, they typically show a symbol indicating the presence of a body diode. In this case, it did not, which was somewhat curious in its own right. The schematic attached is my 'best guess' for what's going on within the hybrid/ASIC, and I'm fairly sure I'm far from correct - I'm hoping that folks wiser than me can take a stab at it. I've also attached a schematic that more clearly shows the pins on the hybrid/ASIC - all four FETs are broken out to independent pins (source and drain are on multiple pins on the actual package, for increased current handling). Note the 'diode' connection is just how it tests out with a DMM. The component tester indicates the N-channel FETs have a 1.5V threshold, and about 650 pF gate capacitance. The P-channel FETs have a 3.6V threshold, and 820 pF gate capacitance.

It's a very clever circuit from a time when gate driver ICs in high side or half bridge configurations must have been uncommon and/or expensive.  As long as there is some dead time in the N-MOSFET gate drive pulses (Q8 gate voltage is 0V for a brief time before Q9 gate voltage goes to 5V and vice versa), shoot through should be avoided.

The design probably dates back to the mid- to late-90s, from the date codes on some of the ICs, and based on the legacy of the radar system that these were originally bought for. Q8 and Q9 will always have a dead time between them, they are driven by the rising edges of Q and Qbar from U2A, so the time difference between the two is the pulse width of the input pulse applied to EN_P/EN_N.

This is curious.  For starters, please probe your +28V rail.  If you're really throwing 12A or more into this coil, there will be significant voltage drop across R5 || R6, depressing the voltage on the +28V rail and therefore the voltage across the coil.

As mentioned above, since the working module is potted, I can't probe that node. However, the voltage drop across R5||R6 would in part explain why I have a lower voltage across the coil (some of the pulse energy would come from C2, which while shown in the schematic as a single 10uF cap, on the board is an array of 20 0.47uF ceramic caps). The Rds(on) of the output FETs would also contribute a bit to the voltage drop. I'm confident in the current measurement, I verified it by inserting a 0.5 ohm shunt resistor in series with the coil and measuring the voltage developed across it.

This is a very typical overcurrent detector for an old school analog design.  U3 makes 2.495V nominal.  Ignore the input current into U1C pin 9 (voltage drop across R11 = 0V) and add the ~120mV required for U1C to change its output state; this gives 2.615V across R9 to get U1C's output to go high, which in turn requires 51.3mA collector current from Q1.  Assume Q1 has a gain of 60; you'll need 855µA base current and 52.1mA emitter current.  Assume VBE = 0.8V when Q1 is on in this condition.  That gives 52.1mA * 26Ω + 0.8V = 2.15V across R7 to turn on Q1.  The total current through R5 || R6 to turn on Q1 is therefore 52.1mA + 2.15V / 140Ω = 67.5mA.

R7 ensures that Q1 turns off once the current decays, and C3 helps prevent Q1 from turning on too quickly.  The voltage drop across R7 seems quite high unless D1 is either backwards in the schematic or a very special diode (Vf > 2.2V with margin), since D1 can't clamp the voltage across Q1 Vbe and R8, otherwise Q1 never turns on.  Based on what you write later, D1 is a normal Zener diode so I think it's backwards in the schematic.  Also, are you sure you have the right values for R7 and R8?

I figured the operation was along these lines, though C3 baffled me. It seemed like the 67.5 mA threshold current was too low, I expected it to be the 12.5 A measured through the coil. I too thought D1 was backwards, and checked it several times on two different examples of broken driver boards. Desoldering and measuring the diode shows Vf of 0.6, and a reverse breakdown of 6.8V, which is why I showed it on the schematic as a zener. With it in the orientation shown on the schematic, I would expect ~0.6V across it while the FETs are driving current through the coil, which would be too low to turn Q1 on. It's possible the diode was damaged by the incorrect cable harness, one very obvious failure on all the damaged boards was that R5/R6 were open (like fuses, I guess!) R7 and R8 are 0805 SMD resistors with printed values, and they were checked in-circuit with a DMM. My understanding is that this isn't so much an overcurrent protection circuit as a means to ensure that the coil current has risen past a specified value. Once it's reached a threshold, U1C turns on, and cuts off the set or reset pulse (via U4A/U4C). This happens ~500 ns after the start of each pulse. I can check this by operating the circuit without the coil at the output. Now, the current is zero, but the voltage at the output stays on for approximately 2.5 us, which is set by C5/R13 and C7/R15.

Are your MOSFET models in LTspice good models for the MOSFETs in the ASIC?

No, the purpose of mocking something up in LTspice was to design a replacement for the damaged drivers. My previous post has an LTspice schematic for what I came up with. Most of the gate driver ICs I found were either for N-channel only (and hence used a bootstrap cap to generate the gate voltage for the top FETs), or were suitable for complementary FETs but could not tolerate the 28V supply voltage. As a power electronics noob, I'm not sure if what I'm attempting is bog-standard and easy (15A in 500 ns, falling back to 0A in ~150 ns - it seems scary fast to me), so I would like to try simulations first to get a reasonable design that I can make a PCB for. Additional constraints I would try to hit: available supply voltages are +5 and +28, the original board is 1"x1.5"). Thermally, this design is straightforward since the FETs are only active for a very short duty cycle (two switching events every 200 us).

This strikes me as very low inductance for a relay, but I have zero experience with "latching circulator coil"s in RF circuits.

The Wikipedia article on RF circulators (https://en.wikipedia.org/wiki/Circulator) has a picture of a latching circulator (under the title 'switching circulator') implemented in WR-90 waveguide (8-12 GHz). The channel in which the ferrite puck is placed is approximately 2.5 cm across. The ones this circuit is designed to drive are WR-10 (75-100 GHz), so about 1/10th the size. Even on the WR-90 circulator pictured in the article, the coil was quite small, so I'm somewhat confident that the inductance measurement is good. Circulators don't really behave like relays, the current pulse through the coil creates a remanent magnetization within the ferrite puck which sets the direction in which the circulator operates. By flipping the current pulse (and hence the magnetic field) around, you can change the circulator direction, implementing a super low loss, fast RF switch with very high power handling. The isolation isn't so great (~20 dB), but one gets around this by stacking multiple circulators. We do this in our millimeter-wave pulsed radars at Ka- and W-band to switch between transmit and receive mode.

[slugrustle]

Responding quickly and without quotes just to get something down; I couldn't stop thinking about this.

Regarding D1 and the current comparator circuit, it looks like the engineer who built this was a clever bastard.  They probably picked a Zener because Zener diodes have higher forward voltage for the same current than normal diodes or even switching diodes.  Either they already had the H-bridge running and were able to characterize the Zener Vf response during the coil current pulse to aid in choosing values for Q1, R7, R8, R9, and C3 and/or they did a lot of bench tuning with parts kits and solder braid.  I've been there...

In any case, D1 almost has to be oriented as-is to prevent dropping too much voltage during the coil current pulse, while still dropping enough voltage to drive Q1 without exceeding the pulse current ratings on R7, R8, and Q1's base.  Super clever.

As for the coil current rise and fall times, your new favorite equation is: di/dt = v / L, where i is the instantaneous current through the inductor, v is the instantaneous voltage across the inductor, and L is the inductance.  Thanks for the wikipedia article on RF circulators; they're simply fascinating.  This one that uses the remanent flux in a ferrite is really neat.  375nH seems reasonable.

To get up to 15A in 500ns, you need at least V = 375nH * 15A / 500ns = 11.25V across the inductor continuously during the 500ns pulse.  Eminently doable from a 28V supply.

To get from 15A back to 0A in 150ns, the inductor needs to discharge into a voltage of at least V = 375nH * 15A / 150ns = 37.5V, which is higher than your 28V supply.  This is still doable, but it requires a little trickery.  I would do something like the attached hand drawn schematic, which uses the same gate drive configuration for the H-bridge but adds two diodes (both labelled "New") that allow the coil voltage to exceed 28V when the coil is discharging after the MOSFETs turn off  (as drawn in your schematic, the coil voltage would clamp to the +28V rail and GND through the MOSFET body diodes in discharge).  Finally, the bidirectional TVS diode is there to clamp the voltage across the coil somewhere lower than the breakdown voltage of the "New" diodes but still above 37.5V.  This TVS diode is going to nominally dissipate 0.5 * (15A)^2 * 375nH * 5kHz = 211mW if the pulses (either polarity) come once every 200µs.  If your positive pulses repeat at 5kHz and each is followed by a negative pulse, the power dissipation would double.

I think R18 and C10 are absorbing the coil discharge energy in your circuit in a more damped fashion than the TVS method I'm mentioning, and R18 will have equivalent power dissipation.  Either approach should work as long as the circuit is tuned properly.

I wonder if the two diodes in your MCM not shown in the schematic are permitting the coil voltage to exceed 28V when the coil discharges after the MOSFETs open.  Physically, the circuit requires something like that to get a coil current discharge rate exceeding 28V / 375nH = 74.67A/µs.

EDIT: You could also replace the two diodes labelled "New" in my drawing with unidirectional TVS diodes having at least 10V rating (I'd probably go at least 15V for margin and/or test it; working voltage differs from breakdown voltage and differential impedance is a thing) and the same orientation and ditch the bidirectional TVS.  This would let you discharge the coil back into the +28V rail and dissipate less heat in the TVS diodes.

[silverback]

Hi I have seen this sort of bridge from EMS before.
 The latching circulator has a ferrite junction which is driven from one remanence state to the other around its BH curve.
Its inductance when saturated is very low probably less than 100uH plus wiring to it. In its linear region as it goes around the BH curve its inductance is in the order of 3 to 5 uH.
I have attached a similar bridge circuit from an EMS driver.
Hope this is useful to you. When simulating modelling the ferrite junction is interesting.

[Doctorandus_P]

I guess the thing with the diodes is a bit different.
MOSfet's simply can't be made without the cathode of the body diode connected to the Drain, and the cathode to the "bulk silicon". And this bulk silicon and cathode has to be connected to "something", because leaving it floating will introduce a lot of nastyness from parasitic coupling or charge pickup. And with normal FET's it is thus connected to the drain to give it a defined voltage. But this also has unwanted side effects because it increases capacitive coupling in the FET's. So if you have the ability to control the whole design, then you can do something else with the cathode of this diode.

Note that spice also has Fet's with the anode of the body diode as a fourth terminal. One of the early challenges in designing CMOS circuits was that the one of the body diode's had to be connected to a low voltage (GND) while the body diode of the P-channel mosfets had to be connected to a high voltage.

[MathWizard]

So how do they know anything is working at 95GHz? How do you get from there down to some 60Hz TV screen or whatever it is ?? And what kind of tubes or transistors work at those speeds? Do they cost $100,000 each ?

If they made RADAR way back in the 1930's, without anything like a modern DSO, how do they get any signals strong enough to do anything with, or even know it's there ??

[radar_macgyver]

Thank you so much guys, I think that's the right answer to have diodes in series with the bridge legs to prevent the coil from discharging through the body diodes. That discharge was what caused the increased fall time in the coil current. I'll try modeling this up later, with a more modern H-bridge and driver.

@slugrustle, the voltage across the coil does get considerably higher than 28V when the driver turns off - about 60V according to my faux-differential probe. And I feel a bit better that you feel the original designer was a smart one - I've been staring at this for a while now and not getting far past the basics. I'm fairly certain that the value of the sense resistor (R9 in my schematic) is chosen based on measurements of the coil current, since among the five boards I have, there are three different values ranging from 51 to 63 ohms. When simulating it in LTspice, I got wildly different results depending on the exact diode chosen. The damping resistor (R10) across the coil also has different values across boards. I suspect that each coil has slightly different characteristics, so they trimmed the damping resistor to get the least overshoot and ringing. Using a TVS would clamp the inductive kick, but with nowhere for the energy to go, I would expect some ringing.

@silverback, thanks much for the screengrab of the driver, that confirms slugrustle's hunch of using series diodes. Is that from a lower frequency design with a beefier coil? It shows discrete FETs instead of the module I found in mine. Also, just curious if you've found an alternative source for the circulators. After EMS was absorbed by Honeywell Aerospace, my predecessor requested a quote for a set of latching circulators and was basically given a six figure number. He interpreted it as "unless one is building the next Cloudsat radar, it's off the table"

@Doctorandus, my first thought was that the FETs have a separate substrate terminal, but the direction in which the diode showed a junction didn't match that assumption. I could be wrong - I'll go check it again. LTspice has a symbol for a FET with substrate, but one needs to provide a suitable model. Are such devices even available? I think there's a thread about this on here somewhere.

@MathWizard: the cost of a CPI VKB2461 extended interaction Klystron is about 3 dB higher than the number you had - and they have a limited life. They're made in Ontario! Our radars use a final IF of about 70 MHz that's digitized for processing, with an additional IF at ~2.1 GHz. The mixer going up to and down from W-band is pumped at 15.4 GHz and uses the x6 harmonic. The receiver LNAs and most semiconductors are GaAs - the EIK is the only tube used. There's a nice window in the atmospheric absorption spectrum at ~95 GHz through which we can make useful measurements. Back in the day, they used detector diodes to convert the RF directly to DC which could be displayed on a CRO or the old PPI scopes (movie props these days). Attached is 1 hours' data from a vertically pointed W-band we deployed last month. It's meant to observe cloud microphysics.

[slugrustle]

When simulating it in LTspice, I got wildly different results depending on the exact diode chosen.

Your circuit is using D1 in a regime that I am fairly certain the LTspice model does not contemplate.  The most straightforward way to get something like this working the first time would be to try different components for the D1 diode by itself hooked up to the H-bridge with drive signals from a sig gen with appropriate pulse widths (no need for current sensor) and pick one that works well, measure it, then design the rest of the current sensor, then fine tune that.  Tons of fun, lol.  I'm guessing this is what the original designer did.  Or maybe they copied the circuit from elsewhere or had relevant experience with such things.

Using a TVS would clamp the inductive kick, but with nowhere for the energy to go, I would expect some ringing.

The energy dumps into the TVS and dissipates as heat.  I've used a similar setup for relay coils to get them to discharge before the contact opens so the coil doesn't fight the contact spring.  What happens is the voltage across the coil clamps to whatever is required to pass the current through the TVS (Zener for the relay coils due to lower current, but same idea) until the coil current drops to zero.  Then the voltages ring very slowly based on parasitics on the board, but the energy is low since the coil current is near zero.  Low power flyback converters sometimes use a TVS in lieu of an RCD clamp, with similar results.  An RC snubber should work fine so long as it's properly tuned, no problem there, and it might result in less radiated EMC from the coil driver as a whole assuming the dV/dt is lower on initial coil discharge for the snubber vs. a TVS.

@silverback, thanks much for the screengrab of the driver, that confirms slugrustle's hunch of using series diodes. Is that from a lower frequency design with a beefier coil? It shows discrete FETs instead of the module I found in mine.

Agreed about the screengrab.  Very nice to see it drawn up in another working implementation for comparison; much better than simply guessing.  I don't see any reason you can't accomplish what you're trying to do with discrete FETs, assuming good board layout.  Switching converters routinely run at frequencies well above 5kHz using discrete FETs.  I've personally done a 120kHz flyback, and newer stuff goes higher.

@Doctorandus, my first thought was that the FETs have a separate substrate terminal, but the direction in which the diode showed a junction didn't match that assumption. I could be wrong - I'll go check it again. LTspice has a symbol for a FET with substrate, but one needs to provide a suitable model. Are such devices even available? I think there's a thread about this on here somewhere.

Linear systems makes some tiny high speed lateral DMOS FETs for use as switches, and those bring out the substrate connection to help with biasing.  That's the only kind I've seen still in production.  I doubt anyone would ever do that on a power device.

[silverback]

@silverback, thanks much for the screengrab of the driver, that confirms slugrustle's hunch of using series diodes. Is that from a lower frequency design with a beefier coil? It shows discrete FETs instead of the module I found in mine. Also, just curious if you've found an alternative source for the circulators. After EMS was absorbed by Honeywell Aerospace, my predecessor requested a quote for a set of latching circulators and was basically given a six figure number. He interpreted it as "unless one is building the next Cloudsat radar, it's off the table"

The alternative supplier would of been COM DEV Europe, which is now also absorbed by Honeywell. Russia did some EHF circulators but I would not go there. 

[radar_macgyver]

I added the diodes to the sources of the top FETs and now that the voltage across the coil is allowed to rise > 28V, the current falls to zero much faster - about 100 ns. I also implemented a more 'straightforward' low-side current sense to cut off the pulse once the coil current reaches a threshold. The selected comparator is fast enough that the actual coil current limit is very close to the comparator setpoint. I've used both back-to-back zeners and an RC snubber to keep the inductive kick down to a reasonable value, which means I can choose 60 or 80V FETs.

In my implementation, I'm thinking instead of the latch built around NOR gates and RC networks, I'd use a 74AC123 dual monostable to generate the set and reset pulses. I'd also do low-side current sensing as shown in the LTspice sim. It'll be a challenge to squeeze this down to 1.5x1", but I'll give it a go.

The alternative supplier would of been COM DEV Europe, which is now also absorbed by Honeywell. Russia did some EHF circulators but I would not go there. 

Rats! All the public info on Honeywell's website only mentions Ka-band circulators, it seems like W-band is too specialized.

Once again, thanks for all the responses!