The FDPF51N25 carrying only 0.35A in a TO-220 package and fully on is only dissipating 0.02W so it shouldn't be getting warm. So possibilities:
1. It is carrying more current than expected or is not fully on. How are you measuring current? What does the D-S waveform look like?
2. You have a fake device.
3. You have a defective device.
14V on the gate is no problem it is rated for +/- 30V.
Thanks, Moffy. I am measuring current by way of the bench power supply, which is feeding only the "high voltage" part of the circuit (i.e., what is going through the N-FET and motor). I have it set to a maximum of 350mA, but at lower duty cycles it is showing more like 275-300mA.
I am more and more inclined to think the N-FET I was using is a fake part. One thing that I wondered about when I got the part is that the tab is enclosed in plastic (is that a TO-220F? or ??) - that made me nervous about its ability to dissipate heat, though as you say it shouldn't have been getting hot in the first place. And perhaps more conclusively ... it has now failed completely!
I swapped it out for an FDP33N25, which is rated 250V / 33A. So far, it seems to be performing better; unlike the previous part, it runs completely cool when the PWM is 100% (i.e., no actual pulse, just continuous on). It still seems to get a bit hot when the PWM is at a low duty cycle (10-15%), but not when the PWM is at a higher duty cycle (>20%). Odd ...
Am I reading your schematic correctly? You're PWM driving a 12 V motor at 180 V?
No, not at this point, though that sounds like it could be exciting!
Ultimately I would like to control higher voltage (90 - 180V) DC PM motors with this circuit - thus the rating of the N-FET for 250V / 50 amps (or now, 33 amps) and the indication of a high-voltage DC power supply. But since I am not entirely sure that I know what I'm doing ... I figured it would be a heck of a lot safer to hook up the bench power supply set to 12V, 350mA, rather than the rectified-and-filtered mains - which, yes, is also not 180V, but closer to 160. Did I mention that I am not entirely sure that I know what I'm doing??
Actually you have no ringing. Try to catch picture with the higher samplerate. Just increase the memory depth.
Mahagam, can you say more about not having ringing? Are you saying that this is an artifact of the DSO? FWIW, when I swapped out the N-FET a little while ago, I also experimented with a slightly different configuration and some different values for the resistors at the gate of the N_FET. The original circuit had the 10Ω resistor before the 100KΩ resistor to ground; I changed it so that it now comes after (see R6 and R7 in the attached, updated schematic). In terms of changing values for the resistors, I first tried going with a 100Ω resistor to the gate, and a 1KΩ resistor to ground. This seemed to eliminate the ringing (or what I thought I was seeing as ringing), at the cost of drastically increasing the rise and fall times, to nearly 1υS. I then changed back to a 10Ω resistor to the gate, keeping the 1KΩ resistor to ground; now the rise/fall time is in the vicinity of 100ns; no apparent ringing on the rising edge, but what looks like ringing at the bottom of the falling edge.
Please, anyone, do not hesitate to tell me what I am doing wrong. As you can no doubt tell from the above, though I have dabbled in electronics for many years, my only training is trial and error ... and I'm really, really good at the second part.