Some signal tracks need to be routed through vias... but which?

[shadewind]

I'm laying out a dev board which uses the Altera Cyclone IV EP4CE10 in a EQFP144 package. It's a two sided board (yeah I know, 4 layer would be better for this but 2 layer is cheap) and I'm realizing that I cannot fit all the I/O tracks between the decoupling caps on the top side of the board so I will more or less have to (at least as far as I can see) route some of them on the bottom layer by bringing them down with vias. Is there any distinction I should be making here on what tracks should be routed on the bottom side vs. the top side? Or should I just route whatever I see fit on the bottom side from a layout perspective?

[deephaven]

In general terms, clocks are the most critical signals. Minimising total track length is more important than whether or not to go through a via, but if you can do it without a via so much the better. Also try to keep clocks away from any other fast signals (data lines).

[shadewind]

If my intuition is correct, the reason for this is that a via will mostly add resistance but increased track length will add inductance?

[tnt]

It's also a change in impedance because suddenly you have a piece of wire that's perpendicular to the ground plane.

But how fast are your signals ? (rise time & frequencies involved)

[jahonen]

I think that if one has two-layer board with many digital signals in it, then the whole impedance thinking is futile, since it is pretty much impossible to get low enough impedance with sane trace widths, tracks would be simply too wide for usual board thicknesses (75 ohms, which is still relatively high, is achieved if track width is about same than dielectric thickness from the ground plane to the trace). Of course if one could make the board 0.2 mm or so thick, then it would work. But for mechanical reasons, it is usually out if the question.

So it usually means that one must simply cram all the required traces somewhere and try to squeeze some ground here and there and hope that it works And then later re-design it using proper multilayer board if EMC compliance/RF immunity is required.

Regards,
Janne

[shadewind]

I think that if one has two-layer board with many digital signals in it, then the whole impedance thinking is futile, since it is pretty much impossible to get low enough impedance with sane trace widths, tracks would be simply too wide for usual board thicknesses (75 ohms, which is still relatively high, is achieved if track width is about same than dielectric thickness from the ground plane to the trace). Of course if one could make the board 0.2 mm or so thick, then it would work. But for mechanical reasons, it is usually out if the question.

I'm not quite following, what does track impedance have to do with number of layers and board thickness?

So it usually means that one must simply cram all the required traces somewhere and try to squeeze some ground here and there and hope that it works And then later re-design it using proper multilayer board if EMC compliance/RF immunity is required.

So if I think it's difficult to fit all the tracks on there with sane routing on a two layer board, it's because it simply isn't very easy?

Anyway, I'm starting to realize that this project is a bit meaningless. I will get myself an Altera DE1 instead and using that instead. Then I'll try to come up with a specific project and implement that. That way, I probably won't need all of the IO and I will know what the IO will be used for thus giving me some guidance on how to route those tracks.

But I have to wonder, it can't be too uncommon for hobbyists to use two-layer boards where multi-layer boards would be more appropriate, can it? It's very expensive to use four layer boards for just messing around and trying to learn things.

[jahonen]

I think that if one has two-layer board with many digital signals in it, then the whole impedance thinking is futile, since it is pretty much impossible to get low enough impedance with sane trace widths, tracks would be simply too wide for usual board thicknesses (75 ohms, which is still relatively high, is achieved if track width is about same than dielectric thickness from the ground plane to the trace). Of course if one could make the board 0.2 mm or so thick, then it would work. But for mechanical reasons, it is usually out if the question.

I'm not quite following, what does track impedance have to do with number of layers and board thickness?

The geometry of the trace structure in a PCB defines the characteristic impedance of a PCB trace (dielectric constant, trace width and dielectric thickness are the key parameters, google for microstrip and stripline). It really is a fundamental feature of electromagnetics. That is something that marketing people would be keen to change as it would make PCBs cheaper (OTOH, antennas would become more difficult to do, so I'm not sure if that would be wise to do in this wireless age ).

So it usually means that one must simply cram all the required traces somewhere and try to squeeze some ground here and there and hope that it works And then later re-design it using proper multilayer board if EMC compliance/RF immunity is required.

So if I think it's difficult to fit all the tracks on there with sane routing on a two layer board, it's because it simply isn't very easy?

Anyway, I'm starting to realize that this project is a bit meaningless. I will get myself an Altera DE1 instead and using that instead. Then I'll try to come up with a specific project and implement that. That way, I probably won't need all of the IO and I will know what the IO will be used for thus giving me some guidance on how to route those tracks.

But I have to wonder, it can't be too uncommon for hobbyists to use two-layer boards where multi-layer boards would be more appropriate, can it? It's very expensive to use four layer boards for just messing around and trying to learn things.

It probably is wise to get a development board, if you don't have any specific application in mind.

I didn't say it couldn't work, it depends much on what you are trying to do. With 2-layer board, (inductive) crosstalk becomes quickly quite high and can be a killer, when the ground plane is far away (h>>w) from the traces. Especially number of unsynchronized signals adjacent to each other is a critical parameter along the edge rate, when fundamental rules and operating margins are bent because of the cost. But, for example, a synchronous memory bus could work, if the clock trace is kept sufficiently far away from the bus signals. In that case, it does not matter if the bus signals have high crosstalk to each other, if they have enough time to settle before the active clock edge. Also, providing sufficiently stiff power distribution can also be a problem if the board has very many signals.

Regards,
Janne