Cannot tell from the pictures of the logic analyser, looks like only captured 1 signal at a time, need both sda and scl at the same time.
Look up i2c protocol on Wikipedia, gives reasonable explaination of what the format is.
Basics
Start bit (sda goes low scl high)
1st byte is device 7bit address, last bit of byte is read/write bit, all bytes are 9 bits, 8 data bits 1 ack bit
2nd bytes onwards can be anything, up to device.
All messages end with stop bit (sda goes high with scl high)