General Purpose Power Supply Design

[amspire]

The total cycle length at 32 kHz is then about 2 seconds, meaning I need a low pass filter that rolls off everything above 0.5 Hz in order to recover the average steady value.

You have that exactly right. I think that is too slow for a supply, so I will loose a few bits of filtering and use a faster filter. I have gone for 0.2 seconds to settle within 1mV for a 2V step change. The result is I will add some extra ripple - something like 140uV peak to peak and less then 10uV RMS ripple for a 25V supply. Increasing the RC filter stages from 3 to 6 and I can reduce the peak to peak ripple to about 20uV. Slowing the settling time to around 0.5 seconds with a 3 stage filter also will get you 20uV peak-to-peak noise.  For a lower voltage supply, the noise will scale down proportionally. This kind of ripple does not affect a precision DC voltmeter as you can set it to read over 100 mains cycles and it will average out this noise, and it would not affect my use with a Fluke 540A.

I may be able to come up with a method of correction that goes for slightly less resolution, but has less low frequency components. That is for the future.

Richard.

[amspire]

just want to say I'm your backer here.

You can back him as much as you like. Even with only 20 bits he is playing in 1ppm territory. A 1ppm/°C voltage reference is affordable these days. But with a 1ppm/1°C reference a 1°C temperature change in the case already ruins his LSB. Better, and you start to pay $50 or $100 just for the reference.

And then there is the long-term drift of the reference. Maybe 10ppm/1000h for an affordable reference. Here goes another digit.

Oh, and don't forget the load regulation of the reference. He needs to power the whole micro with that reference, and the micro's current consumption varies. But well, the reference might anyhow not be capable of supplying the micro. So it needs to be used as part of a voltage regulator. The whole voltage regulator needs to be ultra stable. Good luck building that.

The micro itself might also have a few nasty surprises up it's sleeve. E.g. there is no guarantee that the high and low output levels don't vary a little bit, depending on other active pins, active periphery, temperature and whatnot.

And until now we have just looked at the voltage reference and the micro. We haven't looked at the RC filter, the following buffer OpAmp, the power stage and whatever else is there. There is still a long way to got until to get that 1ppm voltage to the load.

In short, don't hold your breath.

You are missing the point. I don't want great accuracy, and I have already discussed the issue with the micro output problems. 0.1% stability for accuracy after calibration would be absolutely great but I can live with less.  All I want is resolution with no evident digitizing steps on the output.

I definitely wouldn't use the output straight out of the micro - it has to come out via a high speed cmos digital IC powered by a voltage reference, and I  as mentioned above, I can pick a synchronous register for my cmos IC to reconstruct the PWM timing if the micro timing is irregular.

All the problems have been taken care of, so you can breath again.

Richard.

[markus_b]

This kind of ripple does not affect a precision DC voltmeter as you can set it to read over 100 mains cycles and it will average out this noise, and it would not affect my use with a Fluke 540A.

Richard, this is all very good and is what you need for your Fluke 540A. But this is far from the 'General Purpose Power Supply Design' I came here to discuss. It may well be that the power stage can used for both, so I'm hanging in here :-).

[SeanB]

An easy way to get the voltage stable is to only power the actual PWM output from a stable reference, by using a 4050 buffer fed from the reference. Will handle the pwm, and will provide isolation. You will need to have a 5V micro and a 5V reference. If you use a single transistor inverter to do level conversion you can run the 4050 off a 10V reference to get a larger output, and make small voltage drops less important.

[amspire]

This kind of ripple does not affect a precision DC voltmeter as you can set it to read over 100 mains cycles and it will average out this noise, and it would not affect my use with a Fluke 540A.

Richard, this is all very good and is what you need for your Fluke 540A. But this is far from the 'General Purpose Power Supply Design' I came here to discuss. It may well be that the power stage can used for both, so I'm hanging in here :-).

By general purpose, I mean I am trying to make it useful to as many applications as I can. If I have a supply that outputs in almost 1mv steps but not quite, I will make the supply useless for anyone who wants to be able to do what they could do with their old Course/Fine adjust analog power supply. And remember, the PWM solution will be cheaper then D/A converters, and it gives me up to four D/A outputs. Obviously I need voltage and current outputs. There are possibilities for the other two.

 I have to apologize as I am just putting a picture together in my head about where this could go, and I think my project will end up looking very different from Dave's, which is a good thing I think. I have a few surprises of my own, but my basic regulator board should be able to provide 0 to 24V at 1A  with no heatsink. It will have a linear regulator output with a switching pre-regulator of some kind. That is what I am working on now.

I am concerned about switching noise getting to the outputs, but if I can get a pretty clean switching supply going, then I have some surprises of my own. That is one area that I will have to wait for a bench test.

Running off a battery is definitely  possibility, but it is not a focus of my design. It may be an option on the final package, and anyone could just use the board with a battery in their own package. The control panel is a separate module again for reasons that will become clear. Lets just say that like Dave, I want to come up with a package that does not exist right now, but its new features go in a totally different direction to Dave's supply.

One thing though. I am really starting to appreciate how much work Dave has put into his design.

Richard.

[amspire]

An easy way to get the voltage stable is to only power the actual PWM output from a stable reference, by using a 4050 buffer fed from the reference. Will handle the pwm, and will provide isolation. You will need to have a 5V micro and a 5V reference. If you use a single transistor inverter to do level conversion you can run the 4050 off a 10V reference to get a larger output, and make small voltage drops less important.

I love the old 4000 series CMOS, but the speed is too high. The clock to the PWM is at 16MHz and I need very clean switching waveforms at that frequency.  It doesn't matter though as I can use a high speed CMOS family, like the 74HC family. I can get all the stability I need from a lower voltage supply I believe.

It is possible I will have a 2.7V microprocessor and and a 2V reference, but right now, the need for low voltages is fading away. There are fast cmos buffer chips for the PWM output that can work at 2V, and their inputs can connect to 2.7V without buffers. Even a 2V reference is absolutely fine.

Richard.

[alm]

I have to apologize as I am just putting a picture together in my head about where this could go, and I think my project will end up looking very different from Dave's, which is a good thing I think. I have a few surprises of my own, but my basic regulator board should be able to provide 0 to 24V at 1A  with no heatsink. It will have a linear regulator output with a switching pre-regulator of some kind. That is what I am working on now.

Feel free to change your mind as often as you want, you're doing 99.9% of the work, so you get to decide.

I love the old 4000 series CMOS, but the speed is too high. The clock to the PWM is at 16MHz and I need very clean switching waveforms at that frequency.

Doesn't clean, fast switching also imply additional HF noise you have to get rid off? Or do you expect the low-pass filter to have enough attenuation to deal with this? I can see that fast edges are critical to the linearity, although I guess you could correct for this in software.

I really like your idea of shooting for similar resolution to the old analog coarse/fine (or multi-turn) pot. These supplies have a lousy accuracy and tempco, but the good ones have no problems with sub-mV settability, and tend to be quite stable once they're warmed up.

[A Hellene]

Firstly, I would like to thank you both, Richard and AcHmed99, for your interesting exchange of views.

Richard, I would never think of expanding the 256-bit PWM AVR modules because of the dramatically reduced speed of the extended PWM cycles. In the past I had thought to combine (to scale and add the outputs of) the 16-bit hardware PWM module output with the 8-bit one to create a faster 24-bit PWM module; but the 8/16 MHz driven 16-bit PWM cycle was already slow enough for such tasks and this topology would require one AVR device per PWM module.

Now, thanks to your previous idea I was inspired to give it a try, using the AVR tiny261/461/861 or the tiny25/45/85 that have a PLL driven timer-counter clock up to 64 MHz, which speeds up dramatically the 16/24-bit software extended PWM modules. Since I do not use the Arduino platform I do not know how efficient code your example can produce. So, I wrote the TIM1_COMPA/B/D ISR in assembly from scratch, and the results are very promising: Only 52 CPU cycles (including the call and return) for the 24-bit sigma-delta loop! Mind you that I have not even simulated it but I do not think that there are any errors or omissions; anyway, here it is:

Code: [Select]

; This is the ATtiny861 PWM Timer1 Compare-A/B/D ISR handler (in Fast PWM Mode), where:
; * Vlt_Out: 24-bit PWM target output value, in 3 SRAM consecutive bytes, MSB first
; * Vlt_Err: 24-bit PWM error accumulator, in 3 SRAM consecutive bytes, MSB first
; * OCR1C holds the Timer1 TOP value, which must be set equal to 0xFF
; * TC1H (the 10-bit Timer1 high byte) is set equal to 0x00; or else set it to zero before the update of OCR1x
; For the Current reference output 24-bit PWM ISR there will be needed another similar set of 3+3 SRAM
;  registers, the Amp_Out and Amp_Err for the second PWM Timer1 Compare-A/B/D ISR handler
; The registers A0..A3 can be any high or low registers of the AVR register-file

push A0 ; [+3c]
push A1 ; Temps: A3:A0 (Non-destructive)
push A2
push A3
in A3,SREG
push A3 ; [14c]
; A2:A0 = Vlt_Err
lds A0,Vlt_Err+2 ; Load A the PWM error accumulator
lds A1,Vlt_Err+1
lds A2,Vlt_Err+0 ; [20c]
; --Magic part #1:
out OCR1A,A2 ; Send the top byte of the PWM error accumulator to the PWM for the next cycle
; --Magic part #2:
sub A2,A2 ; Subtract the byte sent to the PWM from the top byte of the PWM error accumulator
; --Magic part #3:
lds A3,Vlt_Out+2 ; Add the target output value to the error accumulator remainder
add A0,A3
lds A3,Vlt_Out+1
adc A1,A3
lds A3,Vlt_Out+0
adc A2,A3 ; [31c]
; Vlt_Err = A2:A0
sts Vlt_Out+2,A0 ; Save the PWM error accumulator
sts Vlt_Out+1,A1
sts Vlt_Out+0,A2 ; [37c]
; Done
pop A3
out SREG,A3
pop A3
pop A2
pop A1
pop A0 ; [48c]
reti ; [52c] (= 6.50µs @ 8 MHz)
Feel free to try that piece of code and/or to optimise it further, since I wrote it in such a way in order to be easily readable and not speed or code optimised. Finally, the AVR PWM output can easily drive 1.2V-5.0V powered buffers of the 74LVXxx or similar logic family that have 5V tolerant inputs.


-George


<EDIT> Minor code and comments corrections... ToldYa!

[amspire]

George, this is brilliant.

I did mention that the control panel is a different module.

What I didn't say is that for reasons to become evident, the regulator module has to be isolated from the control panel electrically. This means that if I want the control panel option, I need another small dedicated micro on the regulator board doing the basic stiff like the PWM.

Also I was looking how to get about a fourfold improvement just to get the PWM noise below 10 uV.

I think you may have solved the problem.

Had a look at your code and it looks right.

[A Hellene]

Thank you, Richard.

I think that isolation could introduce excessive jitter if not implemented carefully. But I cannot see any problems in using the micro as a dedicated DAC itself, directly producing the reference voltage only, and doing nothing else, while communicating with the control via its fast SPI hardware module as a slave, using isolation. This makes the low power, wide supply voltage range, 8-pin tiny45 become very attractive as a near-ideal DAC with better linearity that any other very expensive <1 LSB INL dedicated DAC.

The only drawback I can see in this topology is the unavoidable introduction of glitches at the output under certain circumstances, where the diff error value loaded at the compare-match registers needs less CPU cycles to complete that the CPU cycles required by the ISR itself. Or glitches, again, when the asynchronous and faster PLL clock finishes before the ISR does. Of course, the OCR1x loading can be moved at the beginning of the ISR (right after pushing the first temp and reading the loaded value) to speed up things a little. But I do not think that there can be any substantial speed code optimizations, since the posted code above is already quite fast. The ISR code can become a little faster if both the 16/24/32-bit variables are loaded not to the SRAM but directly to the 32-byte register-file, which can be more than twice as fast as the SRAM in access time.


-George

[Bored@Work]

This makes the low power, wide supply voltage range, 8-pin tiny45 become very attractive as a near-ideal DAC with better linearity that any other very expensive <1 LSB INL dedicated DAC.

Only in your dreams.

[A Hellene]

Yes, though I have not given it a try yet, I also believe that it will be quite noisy, even as a 16-bit DAC.
However, given the insignificant cost and the simplicity of the design, I think it is worth spending some time to test how exactly it behaves.


-George

[amspire]

I have to add an offset to the buffer output amp anyway, because if the tiny PWM is like the Arduino PWM, it doesn't go to 0V.

However, I can see one problem with the tiny. If the PWM is at 64 MHz, and the micro runs at 8MHz, the interrupt takes longer then the PWM cycle. Is there a single 64 bit PWM we can use for the voltage?

I can think of ways we can still use 8 bit PWM at a least resolution for the current limit.

Otherwise there is an already at strategy that works almost as well. You move your code to a timer interrupt - say a 50us interrupt. It calculate the correction based on a PWM cycle count register and puts the PWM preset into a register.

All the PWM    interrupt does is this. If the preset register is non-zero, it loads it into the PWM, zeros the preset register and sets the cycle count register to one. Otherwise it increments the cycle count  register and returns.

[A Hellene]

Why does the Arduino PWM output not go down to ground? The AVR has true complementary outputs with Rdson 24 ohm at Vdd 5V at room temperature, for both the high and the low output stages. Maybe something is interfering with the PWM out pin or its pull-up feature? Does that pin remain an output even for zero input at the OCRx register? I am nor familiar with the Arduino platform but the m168/m328 are reliable chips. A tiny861 10-bit pure hardware PWM test circuit I had recently implemented was going perfectly down to 0.00V for 0x000 PWM input and had a surprising good linearity. See the t85 and t861[A][P] (go for the [P]ico-Power version) data sheets (Yes, I know, they made their site worse than their AVR Studio 5).

The ATtiny 64/32 MHz PLL clock has a programmable prescaler that outputs the following frequencies: PCK/1, PCK/2, PCK/4, ..., PCK/16384. No need to run the timer at full speed. If, for example the ISR is 52 CPU cycles long, that is 6.50µs @ 8 MHz, 3.25µs @ 16 MHz, 1.625µs @ 32 MHz or 812.5ns @ 64 MHz. You choose the best clock speed in order to have a PWM cycle of at least one and a half ISR's time, to adjust the OCR1x safely. In the paradigm demonstrated above, the time ratio at 8MHz is 1:5, so the timer's clock frequency can safely be raised two times up.

In order to minimise power consumption, you can run only the PWM module with the idle sleep enabled. There is no need to do calculations with such tight code execution. Just implement a simple software SPI with three of the remaining pins that only receives 16/24-bit full length words and updates the PWM unit.


-George

[amspire]

Obviously the ATtiny PWM is butter designed then the Arduino processor. For a PWM value of 0, the Arduino puts out a single clock width pulse.

The thimg with the prescaling is I want to  run the PWM at 64 MHz. 

Anything less and I do get a detectable noise on the output.

I will take a look at  ATtiny specs today.

Richard.

[A Hellene]

The ATtiny line actually is a stripped down ATmega implementation; for example, the tinies do not have a hardware multiplier or USARTs. Both of these lines are of the same material, with a few special exceptions that have additional LCD/CAN/USB/PLL/etc. support. By the way, the tiny861 10-bit PWM test circuit I wrote about above was constructed on a breadboard! So, if something was nor working as expected, like what you reported, I would rather be suspicious of the "sketch"/"shield" software/hardware platform than the AVR chip itself.


-George

[amspire]

Just started having a look at the ATtiny data sheet. They give you one or two options don't they. 

I have the suspicion that the Fast PWM mode which is the one I used might work the same as the Atmega in that the match is acted on in the following cycle, so if the register has 0 in it, it will only clear the output on the second clock. But they data sheet didn't explain it as clearly as the Atmega, so I will have to actually read it.

But there is good news. I did some testing and the correction calculations can be slowed down to as much as once per millisecond and the results form the filter are still beautiful. The code that would run at the PWM interrupt is probably well under 10 clock cycles.  I have the idea in my mind and so I will put up some code/pseudo code today.

There is actually no advantage at all in doing the correction per PWM cycle at all is seems. This is great as it means even if there is a PWM update issue, only a tiny number of PWM cycles could be effected. Correcting at a 1KHz rate produces in effect a 1KHz square wave with an amplitude of 1mV or less, and my 3 stage 10k/0.1uF filter reduces the amplitude of that to below 1uV. Perfect!

Is there a way to stop any other interrupts occurring during the processing of the PWM interrupt?

Richard.

[fmaimon]

All interrupts are disabled during the ISR. The only way another interrupt can occur during an ISR is by enabling the interrupts inside the ISR. The interrupts are re-enabled after reti.

[IanB]

All interrupts are disabled during the ISR. The only way another interrupt can occur during an ISR is by enabling the interrupts inside the ISR. The interrupts are re-enabled after reti.

Is there any concept of interrupt priorities on the AVR chips?

[TerminalJack505]

Is there any concept of interrupt priorities on the AVR chips?

An interrupt's priority is determined by its position in the interrupt vector table.  Interrupts with lower addresses have higher priority.

[fmaimon]

Complementing on TerminalJack505, only xMegas have a real interrupt priority scheme.

[amspire]

If anyone understands the Atmel family, how are 32 "General Purpose Registers" ( addresses 0x00 to 0x1F including the X, Y and Z registers) accessed separately from the thing Atmel calls the "Registers" in the data sheet - the 48 byte locations where all the configuration, ports, ADC outputs, Timers, etc are located. They are located in addresses 0x00 to 0x3F.

Are the "General Purpose Registers" the things called "Registers" in the assembler, and the "Registers" the thing called "Ports" in the assembler?

Richard.

[IanB]

Most likely so. I understand the AVR is a RISC architecture, so the 32 general purpose registers would be typical of that kind of architecture and intended for use by programs. The "other" registers are probably what would be called control registers in general processor terminology.

[TerminalJack505]

If anyone understands the Atmel family, how are 32 "General Purpose Registers" ( addresses 0x00 to 0x1F including the X, Y and Z registers) accessed separately from the thing Atmel calls the "Registers" in the data sheet - the 48 byte locations where all the configuration, ports, ADC outputs, Timers, etc are located. They are located in addresses 0x00 to 0x3F.

Are the "General Purpose Registers" the things called "Registers" in the assembler, and the "Registers" the thing called "Ports" in the assembler?

Richard.

It's confusing but once you realize that the CPU has several different address spaces (aka addressing modes) it will make sense.  They did this so that they could reduce the size of the CPU instructions by cramming the 'addresses' into the op code.  The general registers (aka register file) and the ports (aka I/O registers) seem to have overlapping addresses but don't since they live in separate address spaces.  For convenience, they are mapped into data space (SRAM) which means they may have a different address in that space than they do in their normal address space.   

The ports (I/O registers) can be accessed either from the SRAM memory space or via special CPU instructions.  When accessed from the SRAM memory space they will have 0x20 added to the 'address' (the register file is mapped into the first 32 bytes of data memory.)  The I/O register 'address' is used as-is with the special instructions--such as CBI, SBI, etc.

Check out the first couple of pages of the AVR Instructions Set PDF:

http://www.atmel.com/Images/doc0856.pdf

It explains the different data addressing modes.

[Alex_arg]

Hi amspire , i've been following Dave's PSU design and got the same idea, because i'm not very handy with microcontrollers , but i didn't find the time to try to make it "analog". The switching pre-regulator it's a great idea, but i
was stuck trying to find a simple way to control both regulators from an unique Vset potentiometer.
By the way i've got a cup of questions :
how you make this regulator go down to 0Volts?  negative control voltage ?

Are you aiming to make it portable? No sophisticated batteries in this zone, but i was thinking to use a 12V 7A bat to make it work (those from alarm systems) and a suitable charger.

Greetings