General Purpose Power Supply Design

[alm]

What's wrong with the standard avr-libc util/delay.h?

[Bored@Work]

What's wrong with the standard avr-libc util/delay.h?

For most practical purposes nothing. Under some circumstances the delay in avr-libc gets a few clock cycles wrong (thing of a kind of rounding). But that is irrelevant for most applications, because the surrounding code anyhow uses an unaccounted number of cycles. E.g. if you wrap the delay in some function, the calling of the function can anyhow (but must not) require some time. Or if you wrap the delay in some condition (if(x) delay(100);), the if() adds an unaccounted number of cycles.

As a rule of thumb, delays are not the right way to ensure clock cycle precise timing in an embedded C application. If you need it, you either have to study the resulting assembler code or directly write in assembler.  More often than not delays are anyhow used because the application's architecture is messed up. E.g. someone desperately trying to avoid a timer and interrupts.

[amspire]

What's wrong with the standard avr-libc util/delay.h?

I haven't looked at the code. If the standard avr-libc delay routines do not disable interrupts, then they might be great. If they do disable the interrupts during the period of the delay, then they are useless.

What's wrong with the standard avr-libc util/delay.h?

As a rule of thumb, delays are not the right way to ensure clock cycle precise timing in an embedded C application. If you need it, you either have to study the resulting assembler code or directly write in assembler.  More often than not delays are anyhow used because the application's architecture is messed up. E.g. someone desperately trying to avoid a timer and interrupts.

When you are writing general purpose routines designed to be able to run together, then as much as possible, you do not want the libraries to require any dedicated timers or interrupts. The moment two libraries both require Timer1, then they cannot be used together.  If the timing requirements are not critical (like a minimum settling time in a hardware handshake), the use of delay routines is an excellent solution by any programming "rule of thumb" in a simple dedicated microcontroller usage. It is just a matter of the best compromise. The Arduino LiquidCrystal library is a good example, because who wants to loose a timer or a hardware interrupt just to talk to a simple LCD module?

The issue is that if you write an delay routine to be very accurate, you have to disable interrupts. If you write a delay that is good enough to ensure a minimum settling time has passed, then you can allow for interrupts to stay enabled during the delay.

Two different delay routines are needed for the two different situations, and there is no way you can find one single perfect solution.

Richard.

[BravoV]

Bump just hate to see this nice thread buried deep down there. 

Richard, understand you're still working on the linear front end part, any chance you could share the current pwm digital + vref generator module that you're currently using ?

[GK]

The conclusion is that for most power supplies, if it is stable with a 100,000uf capacitor under all output voltage and current conditions, it is probably going to be stable for most other loads.

Not really.

Suppose you have that 100,000 uF capacitor connected with 0.005 ohms of total lead resistance. Neglecting the capacitors ESR, that gives you a zero already at 318 Hz.

318 Hz is likely to be much lower than the unity loop gain frequency of your power supplies control loop, so in effect, that 100,000uF of capacitance plonked on the output will not degrade the control loops phase margin at all.

[amspire]

The conclusion is that for most power supplies, if it is stable with a 100,000uf capacitor under all output voltage and current conditions, it is probably going to be stable for most other loads.

Not really.

Suppose you have that 100,000 uF capacitor connected with 0.005 ohms of total lead resistance. Neglecting the capacitors ESR, that gives you a zero already at 318 Hz.

318 Hz is likely to be much lower than the unity loop gain frequency of your power supplies control loop, so in effect, that 100,000uF of capacitance plonked on the output will not degrade the control loops phase margin at all.

When you put a 100,000uF cap on the output, the unity gain of the control loop often drops to a low value - probably under 318Hz.

Anyway, you can get caught out if you think the power supply can only oscillate at the frequency where the control loop gain is unity, as virtually any frequency below the unity gain frequency can become a unity gain frequency - if the control loop is allowed to saturate. The only way to make sure a power supply is unconditionally stable with all capacitive loads is to make sure that total phase shift is less then 180 degrees at all positive gain frequencies. This means that without any output capacitor, the phase shift should be less then 90 degrees for all frequencies below the unity loop gain frequency. This is often not possible.

So lets say in the example you gave, the unity gain point was 400Hz. In this case, the zero at 318Hz would really help to make the supply very stable at 400Hz.  The supply may still be able to oscillate at 10Hz if at 10 Hz, the total phase shift reached 180 degrees. The small signal loop gain would be up around 30dB, but if the loop is driven towards saturation, then the effective gain starts to drop down to 0dB allowing an oscillation.

When you have a conditional instability, the supply appears to be totally stable, until it has just the right kind of load to trigger the instability. Often a load with a pulsed overload current at just the right frequency will trigger the instability.

Many supplies may be unstable with a big capacitor, and you probably would not notice. There may only be a 1mv triangular wave effect of the oscillation on the output DC volts, but if you look at the regulating opamp, it is a square wave out. The frequency can be low - even below 1Hz. It is still better to try for stability.

Richard.

[amspire]

Bump just hate to see this nice thread buried deep down there. 

Richard, understand you're still working on the linear front end part, any chance you could share the current pwm digital + vref generator module that you're currently using ?

I have slacked of this design a bit, as I have been thinking about a few other devices, and I was thinking about giving them a common design appearance.

A great way to manage the voltage and current setting still eludes me a bit, so I haven't rushed into a final control panel design, until I get inspiration.

This was never intended to be a commercial product, so it has been a design I do when I have the time. The type of build I was thinking about was something simple and functional, and I would leave it to others if they want to make it look more professional.

Richard.

[GK]

When you put a 100,000uF cap on the output, the unity gain of the control loop often drops to a low value - probably under 318Hz.

It could; it all depends on the open loop output impedance of the supply. The only real point I would like to make here is that putting a really large capacitor on the output of a power supply isn't a very good stability test. It is typically not a really small or a really large value of capacitance which causes stability problems; it is usually a range in the middle.

I certainly wasn't suggesting that a conditionally stable contol loop (that being one in which the loop phase dips below +180 degrees at some point prior to the unity loop gain frequency) cannot oscillate under some conditions (such as control loop saturation); you've gone off on a bit of a tangent there. However since you bring it up, there are actual means of mittigating the dangers of conditionally stable loop and they do in fact have some benefits (such as greater loop gain prior to the ULGF due to a >1 pole roll off. Conditionally stable loops are in fact very common in switch mode power supply design. See here:

http://www.ridleyengineering.com/index.php/loop-stability-requirements.html?showall=&start=2
 

[amspire]

When you put a 100,000uF cap on the output, the unity gain of the control loop often drops to a low value - probably under 318Hz.

It could; it all depends on the open loop output impedance of the supply. The only real point I would like to make here is that putting a really large capacitor on the output of a power supply isn't a very good stability test.

 It is typically not a really small or a really large value of capacitance which causes stability problems; it is usually a range in the middle.

No. A huge low ESR capacitor is not a stability test. But for a well designed lab power supply or regulator IC, it is still the most difficult load to stabilize. For a poorly designed supply, a smaller capacitor can easily be the value that triggers instability.

I certainly wasn't suggesting that a conditionally stable contol loop (that being one in which the loop phase dips below +180 degrees at some point prior to the unity loop gain frequency) cannot oscillate under some conditions (such as control loop saturation); you've gone off on a bit of a tangent there.

Not really. The point I was making is that you said if the pole frequency of the output cap was lower then the unity gain frequency:

that 100,000uF of capacitance plonked on the output will not degrade the control loops phase margin at all

The reason I guess you said this is that in this circumstance, the capacitor would look like a resistance rather then a capacitance at the loop unity gain frequency, and a resistive load will definitely not contribute to instability.

The point I was making is than any frequency lower then the loop unity gain frequency can also be a loop unity gain frequency if the loop is driven into saturation. In these cases, the 100,000uF can degrade the control loop phase margins at very low frequencies leading to conditional instability. I don't think that is going off on a tangent.

However since you bring it up, there are actual means of mittigating the dangers of conditionally stable loop and they do in fact have some benefits (such as greater loop gain prior to the ULGF due to a >1 pole roll off. Conditionally stable loops are in fact very common in switch mode power supply design. See here:

http://www.ridleyengineering.com/index.php/loop-stability-requirements.html?showall=&start=2

It is very common, but best avoided in a lab power supply. It is no big problem when you know of the specific load which is the case with most power supplies, but when the load can be absolutely anything (ie a lab supply), it is a very good idea to avoid a design with conditional instability. I mentioned that with conditional instability, you often need a very specific load to trigger the instability. In most dedicated supply designs, the specific load that can cause instability is not a real possibility, so the supply will never become unstable. In this case, you can ignore the conditional stability, and excess phase shift at the higher gain levels can be used to help improve the phase margins at the unity loop gain frequency enhancing the final stability.

Unfortunately, as that page suggests, there are many cases in power supply design where a total phase shift over 180 degrees at some some frequency where the loop gain is above unity is unavoidable. So with my supply, I am avoiding a design where a 180 deg phase shift is unavoidable. I did find it unavoidable with my circuit configuration if I used a PNP darlington for the power transistor, so I am not using a PNP darlington power transistor.

Richard.

[GK]

No. A huge low ESR capacitor is not a stability test. But for a well designed lab power supply or regulator IC, it is still the most difficult load to stabilize. For a poorly designed supply, a smaller capacitor can easily be the value that triggers instability.

Not really. The point I was making is that you said if the pole frequency of the output cap was lower then the unity gain frequency:

The reason I guess you said this is that in this circumstance, the capacitor would look like a resistance rather then a capacitance at the loop unity gain frequency, and a resistive load will definitely not contribute to instability.[/quote]


I disagree from experience that an extremely large external capacitor is a particularly difficult load to stabilise against. When the capacitance is huge only a very small series resistance is required to form a stabilising zero.

This is especially the case in an advanced design which maintains a very low output impedance prior to closing the global loop, which can be achieved with nested feedback loops or compensation techinques such as Miller compensation.
 
Another thing to point out is that many regulators (including some IC types) have a rather high open loop output impedance combined with limited open loop gain. Putting a massive capacitor on the output in such cases reduce the loop gain to below unity at all frequencies, eliminating any posibility of instability.

[hlavac]

A great way to manage the voltage and current setting still eludes me a bit, so I haven't rushed into a final control panel design, until I get inspiration.

How about two capacitive sliders?

[amspire]

No. A huge low ESR capacitor is not a stability test. But for a well designed lab power supply or regulator IC, it is still the most difficult load to stabilize. For a poorly designed supply, a smaller capacitor can easily be the value that triggers instability.

Not really. The point I was making is that you said if the pole frequency of the output cap was lower then the unity gain frequency:

The reason I guess you said this is that in this circumstance, the capacitor would look like a resistance rather then a capacitance at the loop unity gain frequency, and a resistive load will definitely not contribute to instability.

I disagree from experience that an extremely large external capacitor is a particularly difficult load to stabilise against. When the capacitance is huge only a very small series resistance is required to form a stabilising zero.

This is especially the case in an advanced design which maintains a very low output impedance prior to closing the global loop, which can be achieved with nested feedback loops or compensation techinques such as Miller compensation.
 
Another thing to point out is that many regulators (including some IC types) have a rather high open loop output impedance combined with limited open loop gain. Putting a massive capacitor on the output in such cases reduce the loop gain to below unity at all frequencies, eliminating any posibility of instability.

You are completely correct that there are ways to compensate for the kinds of instabilities I was referring to. For my design, I was aiming at a simple design that had a minimum sensitivity to component variation, so I was looking for a solution that keeps things very simple. I use multiple 2N2907A or variants as the power transistor, and I wanted stability with one or 8 transistors. If I can keep the phase shift in the control below 90 degrees, then the supply should be unconditionally stable with any capacitive load. No extra more complex compensation circuits.

With IC regulators, I have noticed the older designs often never talked about ESR requirements for the output capacitor. It may be they are stable, or it may be that at the time they were designed, the low ESR multilayer ceramic capacitors and the super low ESR electro's were not available to be a problem.  Then came the designs like the LM1117 where an ESR between 0.3 ohms and 22 ohms is recommended for stability. There are a fair number of linear and switching regulators that require a certain amount of ESR.  Many of the latest IC's seem to be designed for stability with low ESR capacitors.

Richard.

[GK]

Just to be clear my comments were made with no intention to imply anything disparaging about your design; they were just general. Most are aware that capacitive loads can cause problems and it is a common mistake to therefore assume that a very large capacitive load makes for an ultimate stability test in general. It’s not always that simple.

I agree that it is necessary to compensate a general purpose power supply to be stable for all practical load conditions. That usually comes with a lot of compromises that many don’t seem to like. I’ve seen a number of published designs for which the designer gloats over seemingly impressive performance  specifications achieved, such as low output impedance at high frequencies, wide bandwidth, etc, etc, but without any real idea of how much they have compromised stability into reactive loads.

[amspire]

Just to be clear my comments were made with no intention to imply anything disparaging about your design; they were just general. Most are aware that capacitive loads can cause problems and it is a common mistake to therefore assume that a very large capacitive load makes for an ultimate stability test in general. It’s not always that simple.

I think when I was making the comment originally about the large capacitance, it was because I wanted to make the point that capacitive loads in general push a supply towards its limits for stability.

Thinking back to when I started electronics, I am sure that if I wanted to make a supply more stable, I would assume that adding a big capacitor is the solution. I wasn't thinking at all about phase shifts in control loops, and I had no idea that the difference between a stable supply and an oscillator often only comes down to about 10 to 30 degrees of phase shift. I probably would have assumed that a capacitor is an easier load then a resistor as the capacitor resists changes to the output voltage while a resistor does not.

Again, I think many people would think that the ESR of a big cap is so low that it can be ignored. I don't think it is intuitive at all to realize that the zero caused by the ESR of a load electro can greatly improve the stability margin. And to this you have to add the extra series resistance of the supply wiring and track resistances that mean that even if you had an ideal zero ESR capacitor, there will some effective series resistance to a supply load.

Richard.

[fmaimon]

Richard , I know you want a cheap reference for the power supply, but check out eBay item 110887906326 . It is a new LM399A for only $10   plus shipping. Yesterday, when I bought 4 of them was $6. At this price is a little below digikey's single unit price.

There are even some LTZ1000A on eBay, but those are expensive (about $40 each).

Now i just have to buy some metal foil resistors ($5 each on eBay, although there is a seller that sells 10 for $15   $10 shipping, all of them used)

[sorin]

Richard , I know you want a cheap reference for the power supply, but check out eBay item 110887906326 . It is a new LM399A for only $10   plus shipping. Yesterday, when I bought 4 of them was $6. At this price is a little below digikey's single unit price.

There are even some LTZ1000A on eBay, but those are expensive (about $40 each).

Now i just have to buy some metal foil resistors ($5 each on eBay, although there is a seller that sells 10 for $15   $10 shipping, all of them used)

REF5050 has better performance and is cheaper

[fmaimon]

REF5050 is 3 ppm/C in it's better option and the LM399A is a 0.5 ppm/C. The 5050 can drift up to 60ppm after 1000hr and the 399 will drift only 8 ppm. So I doubt you will find better than that at that price.

Initial accuracy doesn't mean anything in this or any other application that requires stability. That's why the LTZ1000A costs $40 bucks even with 4% initial accuracy.

[sorin]

The most important thing is the long term stability.
maybe you are confused because the LM399A have 20ppm for 1000h (typical value, not maximum)
0.5mmp is for the LTZ1000A
the 5050 for the second 1000hr have only 5ppm drift so I think that is beter
the maximum temperature drift for the LM399A is 1ppm and not 0.5ppm

[amspire]

I would probably stick to something very cheap for the supply - something with decent short term stability is all I would look for.

However, I am seriously thinking about taking my PWM DAC idea and making a precision programmable reference voltage source. That will need autozero mosfet input opamps, decent resistors, and a really stable voltage source reference. I didn't know that the LM399A's were as cheap as $5 - that is encouraging. The LTZ1000A could be an option for anyone prepared to pay $40. I would probably trust the long term stability of the buried zener ICs over the reference ICs as there are fewer circuit elements to cause long term drift. The LM339A is a known quantity, and it does settle down to be exceptionally stable after the first year or so.

For the ultimate in stability, ideally the whole reference circuit is in a temp controller oven, rather then just having a temp stabilized reference IC. If parts are exposed to less then 1 degree maximum temperature variation, it is easy to get some great temperature stability figures.

It would be at a big cost though. The reference box would use a heap of current on startup, and it would take up to half an hour to fully stabilize.

I am also still stuck on a a good voltage control interface for the supply and the voltage reference. I love a knob that in a single turn can take you from zero volts to maximum volts, but I also need a way to be able to step up the sensitivity to the point where a single turn easily controls down to the millivolt level in the case of the reference. I want it so it is easy to do fine adjustments, while looking at meters rather then the reference so it needs to be easy to control just by touch.

I am definitely open to suggestions. I cannot really finalize a control panel design till I feel I have a good idea.

Richard.

[fmaimon]

The most important thing is the long term stability.

That's what I said.

maybe you are confused because the LM399A have 20ppm for 1000h (typical value, not maximum)
0.5mmp is for the LTZ1000A

Ok. The features of the first page of the LM399A datasheet (http://cds.linear.com/docs/Datasheet/LM199399fb.pdf ) is misleading, citing 0.5 ppm/ºC, but I don't see this 20 ppm/kH. There is a typical of 8 ppm/kH and a figure with a year long 3 sigma drift of 10 ppm (kind of misleading too, as it doesn't show the first 2 month drift).

The LTZ1000A has 0.05 ppm/C and better than 0.3 ppm / kH.

the 5050 for the second 1000hr have only 5ppm drift so I think that is beter
the maximum temperature drift for the LM399A is 1ppm and not 0.5ppm

If I'm reading the datasheet correctly, 5 ppm is the mean value for MSOP-8 package (the best one). It can be between about -8 and 25 ppm. The LM399A will have a mean drift of less than 4 ppm in 10 months (7200 hrs) with a 2 month initial aging and 99.7% (3 sigma) of all devices will be below 10 ppm.

Again, besides initial accuracy, I don't see how a REF5050 is better than the LM399A

[sorin]

However, I am seriously thinking about taking my PWM DAC idea and making a precision programmable reference voltage source.

I'm dont think that a precision PWM will work, unless you calculate the ton and the toff of the mosfet, and other things ...

The most important thing is the long term stability.

That's what I said.

maybe you are confused because the LM399A have 20ppm for 1000h (typical value, not maximum)
0.5mmp is for the LTZ1000A

Ok. The features of the first page of the LM399A datasheet (http://cds.linear.com/docs/Datasheet/LM199399fb.pdf ) is misleading, citing 0.5 ppm/ºC, but I don't see this 20 ppm/kH. There is a typical of 8 ppm/kH and a figure with a year long 3 sigma drift of 10 ppm (kind of misleading too, as it doesn't show the first 2 month drift).

The LTZ1000A has 0.05 ppm/C and better than 0.3 ppm / kH.

the 5050 for the second 1000hr have only 5ppm drift so I think that is beter
the maximum temperature drift for the LM399A is 1ppm and not 0.5ppm

If I'm reading the datasheet correctly, 5 ppm is the mean value for MSOP-8 package (the best one). It can be between about -8 and 25 ppm. The LM399A will have a mean drift of less than 4 ppm in 10 months (7200 hrs) with a 2 month initial aging and 99.7% (3 sigma) of all devices will be below 10 ppm.

Again, besides initial accuracy, I don't see how a REF5050 is better than the LM399A

I refer to: http://www.ti.com/lit/gpn/lm399
what is "3 sigma" ? (I see it in the LT datasheet, but i dont understand)
ppm/KH is for working hour or for hour from the production date??

[fmaimon]

I refer to: http://www.ti.com/lit/gpn/lm399
what is "3 sigma" ? (I see it in the LT datasheet, but i dont understand)

See http://en.wikipedia.org/wiki/68-95-99.7_rule

It basically says that you have 99.7% confidence that all devices will be within that value or, in other terms, 1 device in 370 will be outside that spec.

ppm/KH is for working hour or for hour from the production date??

As I understand, kH is 1000 working hours. That makes sense for me, as such device usually is not powered off.

[fmaimon]

Richard,

Did you think about using a mosfet driver with cmos outputs like the microchip's TC1427 instead of using a logic gate. The rise and fall times looks similar and it has a higher output drive, but the propagation delay is higher. Other advantage is that you can use higher reference voltages.

[amspire]

Richard,

Did you think about using a mosfet driver with cmos outputs like the microchip's TC1427 instead of using a logic gate. The rise and fall times looks similar and it has a higher output drive, but the propagation delay is higher. Other advantage is that you can use higher reference voltages.

It could be good, but I suspect that as a high current driver, the quiescent current +switching current and transients will be too much for the voltage reference to supply without issues. It is also manufacturer specific - which I would like to avoid if possible.

Ultimately, you have to test a cmos buffer chip and see how it performs - you will not find any details of high precision stability for any cmos buffer IC.

Why not just use a modestly priced DAC, and measure the output terminal voltage with a precision ADC and do correction in software. You definitely want a precision ADC for panel instrumentation but you should actually be able to get away with a cheap serial or even on board uc DAC.

This has been discussed endlessly before. Except for speed, the PWM has far more resolution, possibly more accuracy, definitely cheaper and uses all common cheap components from multiple manufacturers. A no-brainer really.

Adding an extra software controlled output regulation loop is a bad idea. You would end up with two control loops, both of which need to be stabilized. Things get really complex when you have loads that may be dragging the output down - perhaps a load with pulses of current above the current limit. You do not want the supply increasing the output voltage to compensate - that would be faulty operation and dangerous for the load.

Getting into $40.00 refrence’s and thermal control is getting a bit ridiculous. Calibration and such, everything in the loop would have to be of equal precsion and stability to be able to take advantage of it.
[/quote]
My supply is made of cheap parts, and the reference I use will be cheap and common to match. It will not be some unique device from one manufacturer.

However, as I mentioned recently, I want to make a precision programmable voltage reference from the PWM concept. Unlike the power supply design, this can use hand picked precision parts, as long as the cost is still affordable.  A $10 or $40 reference makes a lot of sense. Such a reference would include tools to calibrate the reference off another DC voltage reference, such as one of the affordable calibrated voltage reference boards that as available.

The PWM calibration is fully software calibrated, which is nice as I can calibrate off any available reference voltage. I would not need a particular voltage such as 5V or 10V. A 7.2V buried zener reference with a accurately known output voltage would be fine for the PWM calibration.

Richard.

[fmaimon]

I just did some tests using a tiny2313 @ 20 MHz generating an inverted pwm (Setting the output on compare match and clearing on overflow) going to a TC1426 mosfet driver. As the TC1426 in an inverter, the output PWM is correct. The driver supply is a Burr Brown REF01A. I just tweaked the pwm value to get correct output.

The output is on the Agilent 34410A (top one - reading with 10 NPLC) and the reference output is on the Fluke 8840A (bottom one - slow speed). Somehow I forgot to take a picture of the 4V output.

In the 1 V output, the last digit was not stable and changed quite a bit, but allways within 5 counts.


In the maximum output value, the output is close enough from the reference.


Now both meters measuring the reference output.



The last 2 pictures were the whole setup. The rise and fall times of the driver were all within 7 ns. If it were on a PCB and using a proper ground connection for the oscilloscope probe, it would be better than that.