Any progress with evil camera hacking?
I have currently only reduced free time for toying, so I am currently stuck with other stuff with higher priority, I have to finish first. Anyway...
As an FPGA n00bie, this may be a bit too much to chew as a project, so please forgive me a couple of the following dumb questions. Any help welcome!
1) The camera provides its video output at just 66MHz with almost no blanking intervals, but the overall frame rate and resolution fits: To convert to a standard 74.25MHz pixel clock rate, I only need to buffer a single line (two respectively): One being written with 66MHz rate, while the other will be pushed out at 74.25MHz. Is that correct?
2) Camera output is only YCbCr. I still have big mess in my head and hard time understanding what the difference between all those color spaces exactly are (YUV, YPbPr, YCbCr, Y'CbCr, RGB, R'G'B', etc..), but I understand to convert between any two of these, only 3x3 matrix multiplication is required. Question is: Do I need an FPGA with a HW multiplier to be able to accomplish a color space conversion? Is it possible to build a good enough performing multipliers from the generic logic fabric? (Yes, that f!cking FPGA I'd like to use does have exactly 0 multipliers).
3) As the camera outputs only 30 frames/s, is this output mode generally accepted by HDMI sinks? (TVs, monitors) I hope it is...
What I was thinking about accomplishing is to provide a conventional HDMI output and also HD-SDI (1.485Gbps) output.
I have researched what FPGAs are available and Altera Cyclone IV EP4CGX15BF14C8N seems to fit the best. (15k LE, 540kbit mem, 2x 2.5Gbps TRX, 72 IOs, FBGA169). I will use the EP4CE6E22C8N only in case I fail with the FBGA169 pcb design.
For the HDMI transmitter, I have selected a Silicon Image (Lattice) SiI9022ACNR (165MHz 24bit QFN72, 3V3/1V8 compatible), which costs peanuts (compared to for example an AD7513).
For the HD-SDI output, I'd like to use the internal serdes in the FPGA and add just an external cable driver. (Yet to decide which one, can't find any cheap enough one).
I will try to squeeze the design on a 4L pcb. Hopefully the FPGA can be done on 4L.
Thank you for any comments on this.