CPLD (pre-)programming suggestions?

[c4757p]

As one of the options for my function generator kit, I'm investigating a digital control/PLL feature (allowing you to dial in a desired frequency, lock references with another generator, follow an external signal, etc). Right now, it's looking like the best way (in terms of both price and board area - I want this small) to do the frequency control is to put a 16-bit* divide by N and a phase/frequency detector into a small CPLD. Believe it or not, the cost of an appropriate CPLD is about the same as a 4059 and 4046, and those need additional glue logic as well.

I do not want the kit builder to have to program a CPLD. I'd have liked to use a PLCC one, since I can program them in a socket. Unfortunately, all the CPLDs above about 64 elements don't seem to be available in PLCC anymore, and I'm having a hell of a time fitting everything into 64.

I absolutely refuse to spend $100 on a TQFP-100 ZIF socket. I suppose I could print the SMD footprint onto a board and just hold the chip in place... but with 100 pins at half-millimeter pitch, the risk of shorting is high and the ass-pain is monumental.

Does anybody have any clever ideas to program them? Maybe I could have the MCU program the device after the board has been built? Not sure how I'd go about that, it doesn't have enough ROM to hold the CPLD code and I don't plan on USB connectivity. Or does anybody know of any programmable-division PLL chips targeted at the DC-ish to 10 MHz range, around $5 or $6? I don't see any.

I did investigate ways of synthesizing a frequency directly using the MCU, then I could just use a simple phase detector to lock, but I couldn't get the resolution I wanted that way without either having to divide down to a really low frequency or incurring a shitload of jitter, and I used more MCU resources than I wanted to anyway.

*Yup, I know that only gives 4.5-digit control. The MCU can divide the reference clock from 10 MHz to 1 MHz or 100 kHz or lower with an unused timer, and I'm not really interested in millihertz resolution on top of 5 MHz...

[mikeselectricstuff]

I don't know about Xilinx and Altera, but Lattice supply some source code called SlimVME which can be used to program CPLDs (also FPGAs I think) from a microcontroller.
The  way it works is you load the device Jedec file into their IspLever programming software, and select the option to generate files for SlimVME instead of programming the device.
This creates C source files to define const arrays with the data. These are used i nconjunction with the programming C source code. (There is also an option to load data from a file if you have a filing system available).
All you need to do is add some stub procedures to toggle the 4 IOs which are connected to the CPLDs JTAG port, and a 1 millisecond delay routine.
Worked first time when I incorporated it into a PIC32 project.
The data size is only 2Kbytes for a  LC4064 CPLD.
The code itself is fairly compact and optmised for small size - don't have a figure to hand but I think the the 2-3K range
 
It may be worth going to a bigger MCU to hold the code for the convenience of not having to worry about the CPLD






 

[c4757p]

Ah yes, I think I remember you mentioning that in a video or something. I do like that idea. I think that's going to be the way to go. I'm more familiar with the Altera parts and toolchain, so I'll see if they have something similar first, but if not, I'll go with a Lattice part. I forgot you said that, and it didn't occur to me that the company might provide software for this!

5K for an LC4064 isn't bad at all. I only need a bit more than that - I'm running at about 80 LEs on a MAX II. (I'm assuming they're smart enough to compress out data for cells you don't use? Or do they just figure you'll use a chip just big enough for your application? I'll admit I have no idea how the underlying programming system works on a CPLD...) I'm sure I can manage 5-8K extra ROM to cram in a CPLD image - I was planning on a mega168 for the MCU, so I can always just have a separate ROM image that includes the CPLD data and specify an upgrade to mega328 to accompany the CPLD.

Thanks!

Edit - hmm... Altera has a version of this, but they estimate the size at multiple tens of kB (about 25 for the firmware and 10-15 for the CPLD image)! I am not going above a mega328, that's just silly. Lattice it is... I fail to see how the code to dump out the image to JTAG is 25 kB long. That's insane! Cue Dave: You could fly to the moon on 25 kB!

Urgh... Of course, Lattice's software is Windows-only and requires me to register my MAC address and what I had for breakfast... This just can't be easy, can it?

Now I'm considering just soldering both the MCU and CPLD to the board myself and programming it as part of packaging the kit. That also solves the problem of programming the MCU, and allows me to use Altera parts as well (which seem to be a bit more plentiful).

[marshallh]

Break out the jtag pins to bare test pads and use a pogo board to zap them all before shipping off. Seriously.
The altera cplds lose out on price. Lattice iCE40 and similar are complete wins there, <$1. Downside is the package, but you can deal with that. PLCC is basically dead, adapt and move on

[c4757p]

Huh, I hadn't considered the iCE40. I didn't realize they had FPGA offerings cheaper than their CPLDs. It's quite small for an FPGA, but quite decent for a CPLD, cheap as hell, and readily available. I think I know what I'm going to use!

Anybody know of any "traps" I should be aware of? I've never used such a "mini-FPGA" before. What really differentiates it from a medium-size CPLD?

Sadly they're all leadless (except for an EOL'd TQFP-100), so I'll definitely have to solder them on myself. I'm not going to put QFNs or (god forbid) BGAs in a kit with mostly 0805s, SOICs and the occasional 0603 or TSSOP..... But that was becoming the plan anyway, so I can program them.

[Crazy Ape]

Edit - hmm... Altera has a version of this, but they estimate the size at multiple tens of kB (about 25 for the firmware and 10-15 for the CPLD image)! I am not going above a mega328, that's just silly. Lattice it is... I fail to see how the code to dump out the image to JTAG is 25 kB long. That's insane! Cue Dave: You could fly to the moon on 25 kB!

Check this out, ATTiny moving JTAG data from a flash chip, the JTAG stuff is nice and compact. You can obviously do without the flash if your using a larger mcu.
http://spritesmods.com/?art=stdalonejtag

I put together something that programmed an FPGA from an SD Card (basically just a merging of Chans FAT and the Xilinx XAPP058 app note)

Xilinx XAPP058 app note:
http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf

Source code to go with the app note:
http://www.xilinx.com/support/documentation/application_notes/xapp058.zip

[Harvs]

Break out the jtag pins to bare test pads and use a pogo board to zap them all before shipping off. Seriously.
The altera cplds lose out on price. Lattice iCE40 and similar are complete wins there, <$1. Downside is the package, but you can deal with that. PLCC is basically dead, adapt and move on

Can I ask where you get that price from?

Cheapest I could find @ 1k qty was $1.32USD on digikey.

But even still, that's pretty awesome you can get a small PLD for $1.32

[AndyC_772]

Or does anybody know of any programmable-division PLL chips targeted at the DC-ish to 10 MHz range, around $5 or $6? I don't see any.

Cypress CY22393F:
http://www.cypress.com/?mpn=CY22393FXC

You can either pre-program this device before fitting, or reconfigure it over I2C at run time, or both.

[c4757p]

The altera cplds lose out on price. Lattice iCE40 and similar are complete wins there, <$1.

OK, just want to repeat, thank you for suggesting iCE40! I hadn't even thought to consider FPGAs, didn't know they were available cheaper than CPLDs. I've got the software installed and my Verilog copied in, and it's all working quite smoothly. Fits comfortably into a little $1.65 LP384 with no trouble at all. Much cheaper than a CPLD, and it even has built-in nonvolatile storage!

The software is nice and fast too, not like the clunky abomination that is Quartus. Of course, it's a "light" version just for the iCE40, perhaps the full one is worse.

[mikeselectricstuff]

Bear in mind ICE's internal config memory is OTP, but you should still be able to load config from RAM from the PC, but the file may be big.

[c4757p]

Actually, I'm back to my plan (your suggestion, thanks for that too BTW!) to integrate the image into the MCU ROM image, so that solves that. A bit easier IMO, I only have to program one device, and the entire kit board becomes programmable with a tool many hobbyists own (AVR programmer).

I did not notice at all that it was OTP, though, so thank you for pointing that out. With my luck (and careful reading...) I'd have found out the hard way for sure...

[mikeselectricstuff]

I did not notice at all that it was OTP, though, so thank you for pointing that out. With my luck (and careful reading...) I'd have found out the hard way for sure...

The brief datasheet is IMO rather dishonest as it completely fails to mention this rather significicant limitation - you have to look at the configuration guide http://www.latticesemi.com/~/media/Documents/ApplicationNotes/iCE40ProgrammingandConfiguration.pdf?document_id=46502

[c4757p]

Question, speaking of the NVCM - the datasheet says that the 2.5V rail (specifically for the NVCM) must be connected even if this memory isn't used. Now, Lattice themselves derive this rail simply using a series diode off the 3.3V rail in the ICEstick. They chose a diode with only a 0.4V drop, giving 2.9V on the pin. How dodgy is that? I'd have thought a 0.7V diode would be about perfect - that's 2.6V - so... any idea why they chose a 0.4V diode? 16% seems very high.

[mikeselectricstuff]

The datasheet shows various specs for VPP_2V5
The tightest is for programming, 2.30 to 3.00V
For configuration 2.30 to 3.46
And or SPI mode 1.71 to 3.46

So from 3.3V, a schottky diode should meet those specs.

[mrflibble]

Urgh... Of course, Lattice's software is Windows-only and requires me to register my MAC address and what I had for breakfast... This just can't be easy, can it?

Did you request that license through web or via e-mail? Either I am doing something wrong, or the license request web page is not working.

[c4757p]

It was completely broken this morning, as well as the download page. It's working for me, now, and all the requests I put through came in a big pile at 5pm (about 6 hours after I put them in...). Give it time, I get the impression that they're working on it.

And an annotation - no, it's not Windows-only, I got that impression from the broken download page.

The datasheet shows various specs for VPP_2V5
The tightest is for programming, 2.30 to 3.00V
For configuration 2.30 to 3.46
And or SPI mode 1.71 to 3.46

So from 3.3V, a schottky diode should meet those specs.

Er... sorry for sending you off to check the damn datasheet for me, I should have just done that myself...

[mrflibble]

It was completely broken this morning, as well as the download page. It's working for me, now, and all the requests I put through came in a big pile at 5pm (about 6 hours after I put them in...). Give it time, I get the impression that they're working on it.

Mmmh, I already gave it some time. I got my icestick last friday, and have been trying the license page periodically ever since. All I got was 302 redirects to "Page does not exist". Even tried a few different browsers. Mmmh, maybe they do source ip based loadbalancing, and I get directed to the shit server in the pool or something. You say it was broken this morning, etc ... Did you happen to switch locations (aka diff ip), and it suddenly worked?

You used this one, right? http://latticesemi.com/Support/Licensing/DiamondAndiCEcube2SoftwareLicensing/iceCube2.aspx

And an annotation - no, it's not Windows-only, I got that impression from the broken download page.

Yeah, I had the linux version installed & ready to go on friday. Now all I need is a license...

[mrflibble]

Mmmh, maybe they do source ip based loadbalancing, and I get directed to the shit server in the pool or something.

So much for that theory. Tried a bunch of different source ip's and all the same crap.  Guess I will just pretend to have more patience....

[marshallh]

Email them.

After tangling with the Diamond subscription license thinger I mailed the license support. Within 3 hours I received a fresh license file (was 1AM as well)

[mrflibble]

Email them.

Yup, just did that. So hopefully I can get started tomorrow.