I have played a bit with ultrasonic delay lines from old PAL TVs recently. (Thanks to Dave, and especially to Mike from mikeselectricstuff, for inspiring youtube videos!) I arrived at this via an interest in 1940's computer architectures, which used delay lines as their main memory. I hope to eventually build a simplistic CPU around some "real" ultrasonic delay memory.
These PAL delay lines provide a 64µs delay, and need to be operated in the vicinity of their 4.4 MHz resonance frequency to get a decent output signal level. To store a somewhat useful amount of information, one would ideally want a bit rate on the same order of magnitude. 5 MHz bit rate would allow for e.g. twenty 16-bit words to be stored.
I have played with a simple "modulation" scheme which represents a "1" bit by one full oscillation of a 5 MHz square wave, and a "0" bit by a 0V level for the same 200 ns duration. The delay line is not meant to work with a carrier modulated this rapidly -- it has a pretty high Q factor, and would prefer to keep oscillating... But with some modification of the input signal, I can get the required alternating output cycles. See the attached example, which shows a repeated 0011111111 bit pattern being sent (lower trace is the input to the delay line), and the output from the delay line (upper trace, phase shifted vs. the lower by approx. 64 µs). Whenever the input value changes, the input waveform is modified to jump-start or dampen the oscillation.
In order to turn this into a memory, I will need to sample the output, and send it back to the delay line's input. I plan to compare the output amplitude to a threshold, and use a flipflop to sample and hold that value near the peak of the oscillation. (The clock will need to be adjusted to fit the near-exact number of bits into the delay time, of course, but the sample & hold will restore and re-sync the data, and provide a bit of timing tolerance.) Then resend the bit to the delay line, using the simple modulation scheme shown above.
Which gets me to my question:
There is always at least a factor of 2 between the positive output swings representing "high" and "low" bits, so this should be feasible. But it turns out I am out of my depth here: If at all possible, I would like a single-supply solution, which seems to rule out feeding the raw signal (including the negative swings) to a comparator? A half-wave rectifier for such low-amplitude signals, at 5MHz, turns out to be more difficult than I had expected.
How would you sample the positive output peaks, to distinguish "high" from "low" peaks?
Thank you for any hints! Bonus points for single-supply solutions!