Author Topic: External power outputs with capacitance: do you worry about ESD?  (Read 1101 times)

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Offline tom66Topic starter

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External power outputs with capacitance: do you worry about ESD?
« on: December 12, 2022, 02:48:50 pm »
I am working on rationalising an older design.  It has a load switch which supplies power to an external peripheral, and a buck-boost converter which supplies power to another peripheral.  These devices are connected by up to 1m long cables, and the connectors can be exposed to humans in the power on condition if cables are not connected.  Output voltage is low, less than 10V, and current is less than an amp.

It was my thought at rev 1 to include ESD protection on these outputs due to the risk of a HBM ESD event, and therefore there is a small TVS.  ESD tests passed fine with the product.  Rev 2 comes, and the board needs to get physically smaller, so TVS is potentially on the chopping block.

The outputs have about 100uF ceramic capacitance each (the peripherals have large in-rush current, and we can't change this; the capacitance supports this.)  HBM ESD is 100pF + 1.5kohm series resistance at several kV.  If I assume the loading is negligible (true for open circuit connector) then worst case at HBM 8kV is the 100uF could charge up by 8mV.  Negligible, right?  Even if the 100uF goes open circuit somehow, there are still 2x100nF caps, which would give worst case 4V peak.  That is still 'safe' for the output load switch, within the abs rating of about 18V, although some energy would probably be conducted downstream (switch does not block reverse current), there is further capacitance there which would adequately absorb this... So it does not immediately appear to be a risk.  I already know our buck-boost converter tolerates the output being driven above its set point (provided this is within the maximum switch voltage), it just stops switching, so that also seems OK.

The peripheral is never connected to any external source that can overstress it.  The whole system is battery powered, or USB powered but still ultimately from a body worn battery pack.  So there doesn't appear to be any reason to include a TVS except for ESD.

The problem is, I do still see people suggesting things like ESD protection for USB VBUS (TVS0500 as an example), but the maths above suggests that it's unnecessary.  Am I missing something?
 

Offline srb1954

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Re: External power outputs with capacitance: do you worry about ESD?
« Reply #1 on: December 12, 2022, 07:36:16 pm »
I am working on rationalising an older design.  It has a load switch which supplies power to an external peripheral, and a buck-boost converter which supplies power to another peripheral.  These devices are connected by up to 1m long cables, and the connectors can be exposed to humans in the power on condition if cables are not connected.  Output voltage is low, less than 10V, and current is less than an amp.

It was my thought at rev 1 to include ESD protection on these outputs due to the risk of a HBM ESD event, and therefore there is a small TVS.  ESD tests passed fine with the product.  Rev 2 comes, and the board needs to get physically smaller, so TVS is potentially on the chopping block.

The outputs have about 100uF ceramic capacitance each (the peripherals have large in-rush current, and we can't change this; the capacitance supports this.)  HBM ESD is 100pF + 1.5kohm series resistance at several kV.  If I assume the loading is negligible (true for open circuit connector) then worst case at HBM 8kV is the 100uF could charge up by 8mV.  Negligible, right?  Even if the 100uF goes open circuit somehow, there are still 2x100nF caps, which would give worst case 4V peak.  That is still 'safe' for the output load switch, within the abs rating of about 18V, although some energy would probably be conducted downstream (switch does not block reverse current), there is further capacitance there which would adequately absorb this... So it does not immediately appear to be a risk.  I already know our buck-boost converter tolerates the output being driven above its set point (provided this is within the maximum switch voltage), it just stops switching, so that also seems OK.

The peripheral is never connected to any external source that can overstress it.  The whole system is battery powered, or USB powered but still ultimately from a body worn battery pack.  So there doesn't appear to be any reason to include a TVS except for ESD.

The problem is, I do still see people suggesting things like ESD protection for USB VBUS (TVS0500 as an example), but the maths above suggests that it's unnecessary.  Am I missing something?
Yes. Any wiring inductance, or even the ESL of the capacitor, will cause significant voltage drop when subject to an ESD pulse. The initial edge of the ESD pulse may have a rise time less than 1ns and reach several amps peak current so even a few nH of inductance will produce a damaging voltage.

If you are short of PCB space you might want to consider incorporating spark gaps into the PCB layout. These should be placed so as to shunt the ESD pulse current away from sensitive circuitry. An important consideration for designing ESD protection measures is knowing where the current of the ESD pulse returns to ground. This is more complicated when you have a piece of gear that is battery powered as any current return path has to be made through, possibly unpredictable, stray capacitance back to ground. 
« Last Edit: December 12, 2022, 10:01:03 pm by srb1954 »
 
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Online niconiconi

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Re: External power outputs with capacitance: do you worry about ESD?
« Reply #2 on: December 20, 2022, 08:36:06 am »
If you are short of PCB space you might want to consider incorporating spark gaps into the PCB layout. These should be placed so as to shunt the ESD pulse current away from sensitive circuitry.

Are spark gaps really effective and dependable for ESD protection? As you said, "the initial edge of the ESD pulse may have a rise time less than 1ns". But spark gaps have a turn-on time on the microsecond scale. The rise time is fast (subnanosecond), but not the response time (microseconds, from my experience with 70-volt gas-discharge tubes, I assume free-air spark gaps are even worse). The spark gap may not even have the chance of turning on long after the ESD has ended... 

The test waveform of IEC 61000-4-2 ESD pulse has a duration of 100 nanoseconds, I doubt it's enough to turn on a spark gap. Spark gaps are an order of magnitude slower than the internal ESD protection diodes in the chip. I'd like to see a test report of PCB spark gap's voltage and current response waveform to an ESD test.

Perhaps IEC 61000-4-2 represents a worst case, and in practical applications spark gaps are still better than nothing? I guess the series inductance in the wiring between the connector and the chip slows down di/dt and perhaps it can serve as a rudimentary coordination element for the spark gap at the connector, so it turns on before the main ESD energy reaches the chip? And even if it's not useful for fast ESD, the spark gap is perhaps still useful to protect devices from slower switching transients...
« Last Edit: December 20, 2022, 08:42:48 am by niconiconi »
 

Offline srb1954

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Re: External power outputs with capacitance: do you worry about ESD?
« Reply #3 on: December 20, 2022, 12:04:57 pm »
If you are short of PCB space you might want to consider incorporating spark gaps into the PCB layout. These should be placed so as to shunt the ESD pulse current away from sensitive circuitry.

Are spark gaps really effective and dependable for ESD protection? As you said, "the initial edge of the ESD pulse may have a rise time less than 1ns". But spark gaps have a turn-on time on the microsecond scale. The rise time is fast (subnanosecond), but not the response time (microseconds, from my experience with 70-volt gas-discharge tubes, I assume free-air spark gaps are even worse). The spark gap may not even have the chance of turning on long after the ESD has ended... 

The test waveform of IEC 61000-4-2 ESD pulse has a duration of 100 nanoseconds, I doubt it's enough to turn on a spark gap. Spark gaps are an order of magnitude slower than the internal ESD protection diodes in the chip. I'd like to see a test report of PCB spark gap's voltage and current response waveform to an ESD test.

Perhaps IEC 61000-4-2 represents a worst case, and in practical applications spark gaps are still better than nothing? I guess the series inductance in the wiring between the connector and the chip slows down di/dt and perhaps it can serve as a rudimentary coordination element for the spark gap at the connector, so it turns on before the main ESD energy reaches the chip? And even if it's not useful for fast ESD, the spark gap is perhaps still useful to protect devices from slower switching transients...
I have never done any quantitative measurements on PCB spark gaps but I have seen them visibly breaking down in response to the standard 61000-4-2 8kV ESD contact test.

I don't have a copy of the IEC standard to hand to review but I believe that the pulse waveform is specified into a low impedance 50 \$\Omega\$ load or similar and this gives a relatively quick current decay time.  Operating into a much higher impedance input circuit the decay time of the pulse for the ESD pulse is likely to be considerably longer, which may allow the time required to trigger the spark gap.

Because of the slower response time and higher initial clamping voltage a spark gap by itself is probably not sufficient to fully protect against the ESD pulse but it diverts some of the energy away giving a chip with inferior on-chip ESD protection a better chance at surviving the pulse.
 
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Re: External power outputs with capacitance: do you worry about ESD?
« Reply #4 on: December 20, 2022, 03:10:07 pm »
I have never done any quantitative measurements on PCB spark gaps but I have seen them visibly breaking down in response to the standard 61000-4-2 8kV ESD contact test.

I don't have a copy of the IEC standard to hand to review but I believe that the pulse waveform is specified into a low impedance 50 \$\Omega\$ load or similar and this gives a relatively quick current decay time.  Operating into a much higher impedance input circuit the decay time of the pulse for the ESD pulse is likely to be considerably longer, which may allow the time required to trigger the spark gap.
Interesting. Thanks for sharing.
 

Offline T3sl4co1l

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Re: External power outputs with capacitance: do you worry about ESD?
« Reply #5 on: December 20, 2022, 03:42:45 pm »
The outputs have about 100uF ceramic capacitance each (the peripherals have large in-rush current, and we can't change this; the capacitance supports this.)  HBM ESD is 100pF + 1.5kohm series resistance at several kV.  If I assume the loading is negligible (true for open circuit connector) then worst case at HBM 8kV is the 100uF could charge up by 8mV.  Negligible, right?  Even if the 100uF goes open circuit somehow, there are still 2x100nF caps, which would give worst case 4V peak.  That is still 'safe' for the output load switch, within the abs rating of about 18V, although some energy would probably be conducted downstream (switch does not block reverse current), there is further capacitance there which would adequately absorb this... So it does not immediately appear to be a risk.  I already know our buck-boost converter tolerates the output being driven above its set point (provided this is within the maximum switch voltage), it just stops switching, so that also seems OK.

Right, the impedance absolutely stomps anything like that.

But, key word "impedance".  It's assumed to be capacitance, but it has ESR and ESL too, and there may be other ESL or transmission line effects in the surrounding circuit, too.

If the layout is careless (i.e., not a solid ground plane), the common mode surge could disturb other things connected to it, like, imagine there's a current sense shunt resistor in there, it has nonzero inductance so both CM and DM on its Kelvin sense leads get a fraction of that incoming ESD.  And if that's going to a current sense amp IC, maybe that will cause problems.

Note this is also what makes supplies useful to absorb ESD.  You can use clamp diodes because the supply has some ~uF on it, and the peak overshoot in the local area isn't going to be more than a few volts, easily handled by a small TVS.

Note also, the low impedance means, when it does go over voltage and cause something to break down (preferably a TVS, but failing that?), it's not 1.5kohms anymore, it's... milliohms or whatever.  Which makes piddly little clamp diodes useless.

So it's easy to see why >= 10 ohms is often seen in series with a signal path, between transceiver and TVS diode.  (Whatever the defacto transceiver happens to be in the case: a bare MCU or logic pin, an RS-232 interface, an op-amp output, etc.)

So, given good layout, a power supply can have quite low enough impedance not to care.  But given poor layout, well... it can always be worse!


Are spark gaps really effective and dependable for ESD protection? As you said, "the initial edge of the ESD pulse may have a rise time less than 1ns". But spark gaps have a turn-on time on the microsecond scale. The rise time is fast (subnanosecond), but not the response time (microseconds, from my experience with 70-volt gas-discharge tubes, I assume free-air spark gaps are even worse). The spark gap may not even have the chance of turning on long after the ESD has ended...
[/quote]

Maybe.  But it needs to be done in a place where the voltage drop will be high enough that breakdown is ~instant.

Note that it might even make things worse.  The last project I tested (personally, ESD gun in hand), I found I could upset the equipment at a much lower level with a certain technique.  That technique turned out to be, hovering the nose a ~mm or so above the target: presumably, the nose charges up to near rated voltage, sparks to the target, and then discharges.  This, to a certain extent, bypasses the impedance / networks in the gun -- the nose and surrounding material discharges ~instantaneously (fraction of a ns) into the target.  In other words: I made a pulse-sharpening network.

So it won't help you much in terms of required filtering, to keep that EMP away -- indeed the EMP could be worse in terms of dV/dt, dI/dt or bandwidth, if not in terms of total energy or peak amplitude.  You'll still need good filtering or shielding to keep that out.  (But, obviously that's a lot easier to do when you have the spark gap somewhere local in circuit, so you can plan all the filtering needed around it.)

Anyway, that's the primary difficulty, the breakdown: if you don't have a high voltage drop, it won't spark, or not right away, and most of the energy continues down the line.  It simply won't fire at all if the wire/trace is short and loaded with a TVS or bypass cap.  And notice you can't simply put a chip resistor or ferrite bead in series to increase the impedance locally (or for short periods of time): the resistor most likely sparks over, and the ferrite bead saturates almost instantaneously (a typical 0603 chip saturates at ~50mA, it's only a few ns before the ESD is dumping multiple amperes).

You can potentially get chip resistors that are rated for high voltages -- they're utterly useless without potting, of course, but it's interesting that it's an option at all.  That would do when you can afford say a kohm here or there, like on medium bandwidth digital or analog inputs.

Other than that (medium to high Z inputs), I think you'd have a hard time finding use-cases for spark gaps.  Especially the PCB kind; voltage is just so completely unreliable.  Even the component kind are pretty gross (50% tolerance?).  GDT are alright (and available in much lower breakdown voltages than air gaps, even accounting for the short time scale).

I, too, have definitely seen sparking in ESD testing; besides the above example (which pretty obviously will spark, it's acting in series with the gun), I've seen it across (or within(!)) common mode chokes, for one.  Which often are made with spark fingers on the PCB, to prevent this damaging the wire.  (The spark gaps act in parallel with each winding.)

And yes, while a ferrite bead doesn't, a CMC does have enough inductance and saturation flux to manage to drop at least some of an ESD pulse.  Still not enough to filter the whole thing, you'll need a much bigger than average one do that -- but certainly enough for spark gaps to be relevant around them.

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