Author Topic: explanation of circuit  (Read 4031 times)

0 Members and 1 Guest are viewing this topic.

Offline xw0927Topic starter

  • Newbie
  • Posts: 2
explanation of circuit
« on: January 24, 2014, 05:04:51 am »
From the attachemnt of the file of the circuit, May I know what is the purpose of the variable gain amplifier CLC 5523 and level comparator CA 3130? and then the output from the signal generator is 2 Vpp?
Thanks.
 

Tac Eht Xilef

  • Guest
Re: explanation of circuit
« Reply #1 on: January 24, 2014, 08:38:31 am »
From the attachemnt of the file of the circuit, May I know what is the purpose of the variable gain amplifier CLC 5523 and level comparator CA 3130? and then the output from the signal generator is 2 Vpp?
Thanks.

What's to know? Unless you're trying to analyse it exactly (in which case check out the usual op-amp tutorials & the chip datasheets), its pretty straightforward and there's not much more to it than your description.

The CLC5523 is an op-amp with its maximum gain set by the 68R resistor on pins 6&7 and the 47R resistor on pin 3. The actual gain is adjusted by a control voltage (0V-2V) on pin 1. The TI6002 is a buffer stage to drive a low-impedance line (~50R, as set by the 49R resistor on the output)

The gain control voltage for the CLC5523 is generated by the CA3130, another op-amp. One input is the signal output from the first circuit, DC-isolated by the 1nF capacitor then rectified by the 2 shottky diodes. The other is a voltage set by the 10K variable resistor connected to pin 3. The difference between the two - the 'set' level from the 10k variable resistor, and the voltage derived from the output of the first first circuit - is amplified (gain set by the 1M resistor & parallel 10R/100nF feedback path on the CA3130), fed to a voltage divider (Ra & Rb, chosen to limit the output to 2V), and fed to pin 1 of the CLC5523 to control its gain.

The end result is that the gain of the CLC5523 is adjusted so that the overall output stabilises at a level set by the 10K variable resistor. Check out the datasheets & do the gain calculations (or simulate it in Spice) to figure out the actual output level, although at first glance 2V seems maybe a bit low...

I'm guessing this is an automatic level control (ALC) for a signal generator - maybe meant for a DDS chip/module?

p.s. Watch out - the CLC5523 has been obsoleted by TI.
« Last Edit: January 24, 2014, 08:42:55 am by Tac Eht Xilef »
 

Offline xw0927Topic starter

  • Newbie
  • Posts: 2
Re: explanation of circuit
« Reply #2 on: January 24, 2014, 09:11:11 am »
From the attachemnt of the file of the circuit, May I know what is the purpose of the variable gain amplifier CLC 5523 and level comparator CA 3130? and then the output from the signal generator is 2 Vpp?
Thanks.

What's to know? Unless you're trying to analyse it exactly (in which case check out the usual op-amp tutorials & the chip datasheets), its pretty straightforward and there's not much more to it than your description.

The CLC5523 is an op-amp with its maximum gain set by the 68R resistor on pins 6&7 and the 47R resistor on pin 3. The actual gain is adjusted by a control voltage (0V-2V) on pin 1. The TI6002 is a buffer stage to drive a low-impedance line (~50R, as set by the 49R resistor on the output)

The gain control voltage for the CLC5523 is generated by the CA3130, another op-amp. One input is the signal output from the first circuit, DC-isolated by the 1nF capacitor then rectified by the 2 shottky diodes. The other is a voltage set by the 10K variable resistor connected to pin 3. The difference between the two - the 'set' level from the 10k variable resistor, and the voltage derived from the output of the first first circuit - is amplified (gain set by the 1M resistor & parallel 10R/100nF feedback path on the CA3130), fed to a voltage divider (Ra & Rb, chosen to limit the output to 2V), and fed to pin 1 of the CLC5523 to control its gain.

The end result is that the gain of the CLC5523 is adjusted so that the overall output stabilises at a level set by the 10K variable resistor. Check out the datasheets & do the gain calculations (or simulate it in Spice) to figure out the actual output level, although at first glance 2V seems maybe a bit low...

I'm guessing this is an automatic level control (ALC) for a signal generator - maybe meant for a DDS chip/module?

p.s. Watch out - the CLC5523 has been obsoleted by TI.


hi Tac Eht Xilef,
Thanks for your explanation,and now i have a clear picture on how it work.

 for the CLC 5523 chip,
 the gain I calculated is 680/47 +1= 14.4,and it mean that the max gain for this circuit is 15.4 for Vg=2V, when Vg decrease, the gain will decrease?..and is that any chip available in market that can replace CLC 5523?
the purpose of this chip is to maintain the output to a constant amplitude?

For the TI6002,
i plan to replace it with this chip http://www.ti.com/product/THS6022,
buffer amplifier mean to amplify the output from the CLC 5523,and the gain is (680/22+1)=26.1,and then i can change the gain by changing the resistor value right?

For the CA3130,

Can I connect the Vg input with a voltage divider circuit instead of CA 3130?
actually what is the purpose of level amplifier?

Ya,good catch,I am doing a DDS function generator,and the problem I am facing right now is when frequency high,the amplitude decrease,and the output amplitude from a DDS chip module is just 1 V which is quite low,that why I need design a amplifier,but I am not expert in designing an amplifier,then I am goggling ,and I found this circuit.
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf