Evaluation of circuit design for Overcurrent / Short circuit detection

[ashubin2005]

Good afternoon!

Please rate my first experience in analog circuitry.
The following task was released: to develop low cost a DC overload protection circuit (cut-off consumption more than 1.8A).

Explanations for the scheme:
A low-pass filter was made on the R6,C5.
The OpAmp U1 amplifies the voltage drop across R9, then OpAmp U2 in the comparator mode compares with the reference voltage from U3 (TL431 is used as its voltage reference).
If the load is consumed more than the adjusted (R14 and R10), the latch is activated on transistors Q4 and Q3, next is opened Q5, the gate of Q2 is attracted to the ground, the load circuit is broken, LED D2 signals user about a malfunction.
The latch on Q4 and Q3 remains on until the main power is reconnected.

R5, C4 is delay line for gate Q2.
This need for exclude the case of a problem with the load when applying power. The power supply circuit of the protection circuit occurs through D1, C1.
After 3ms (time for R5, Q4), the load is switched on.
In the event of any problem with load, diode D1 prevents the voltage from flowing into the problematic section of the circuit and the stored energy in capacitor C1 goes to trigger the protection circuit.

I checked the functionality of this circuit on a breadboard.
What should I pay attention to?
This is my first experience in analog circuitry.
Dear community, please let me know your comments.

[ledtester]

C4 is a pretty small cap, but I'm wondering if it still would be a good idea to add a resistor across it to make sure it discharges when you turn off the power.

[Zero999]

Why not use the LMV358, the dual version of the LMV321?

C4 is a pretty small cap, but I'm wondering if it still would be a good idea to add a resistor across it to make sure it discharges when you turn off the power.

I wouldn't worry. It will discharge through R5 into U1 and U2, when the power is removed. I doubt there will be more than half a volt on C4, after a few seconds of power down.

[Benta]

Incredibly complex for such a simple task.

[T3sl4co1l]

Points of interest for a circuit like this:
- How fast does it act?
- What does it limit current to, under fault conditions (RL --> 0)?
- Does it act fast enough to prevent damage (VCC * IL = Pd in the switch, this can only be sustained for 100s µs, maybe a few ms)?
- What is the startup condition?  (It doesn't look very well defined!)
- What is the reset condition?  (Power cycle, OK.)

The trouble with filtering the sense voltage is, you can't have limiting*, and it needs to be a shorter time constant than the failure time.  And since it's a comparator, it'll simply stop in that time, for any overload above the threshold, regardless of how quickly that's heating up the switch.  It would be perhaps appropriate to have longer dwell times at lower currents.  Well, you do kind of have that, as, note it's a linear filter (RC), not a straight delay: a very large current will charge the RC to threshold much faster than a small current will.

It's not obvious how to relate these two properties: that is, response time as a function of overload current, and what time is allowable given the switch's SOA / transient thermal impedance.  Probably, just poking around with some typical values will get you close enough.  That is, do the simulation for various step load currents,

*But you can, at least crudely, even for a simple circuit like this.  If VCC is low, then notice that Vg is fixed (= VCC), but Vgs depends on IL.  At high enough IL, Vs rises and Vgs approaches Vgs(th).  It will settle at whatever voltage corresponds to the load current (since Vgs > Vgs(th) for Id > Id(th)), depending on device properties, R9, and VCC.  If VCC is variable, it could be limited say with a zener from GND to G, to give more consistent current limiting.

As shown, 50mOhm drops for instance 5V at 100A, which the IRL2203 is more than happy to pass at around Vgs = 4V or so.  So VCC >= 9V would be able to pass this much current.

If your loads are known to be more than say 100mOhm or so, then this fault current won't matter much to the transistor, and R9 is really about all that matters as far as ratings.  If you have harder short circuits than this (e.g. large power supplies, Li polymer, car battery, etc.), you might consider adding some limiting.

Now about the dynamics.

Note the thing doesn't turn on or off instantly (and if it did, that would be an even bigger problem..!).  It takes time for currents and voltages to rise and fall.  And in that time, oscillation can happen, peak currents/voltages can be exceeded, etc.

Note that Q5 turns on pretty hard, it's got about 2mA Ib (again assuming ~10V supply).  This will easily draw 200mA (or more, depends on exact type; I'm assuming BC17 is a typo for BC817 or something?).  Which will discharge C4 pretty quick (dt = C dV/I = (0.1uF) (10V) / (0.2A) = 5us), and Q2's drain risetime will be even quicker (maybe 1 or 2us?).  So if the load's L/R time constant is longer than that, it will fly back and generate peak voltage above VCC.

Q2 is rated for some avalanche, so this likely isn't fatal, but it depends.  If it's carrying fault current, that current will be the starting avalanche current.  It's only rated for 60A, and likely fails somewhat above that.  A current limit over 100A could prove fatal in one hit.  (It also handles significantly less for repetitive avalanche.  Single-pulse really is a single thing, it's not meant to be tested more than a few times over the service life of a part.  In most types of MOSFET, avalanche causes progressive degradation, eventually failing short circuit.)  Avalanche is tested at 160uH, which is... a fairly inductive load, for low voltages; but it's still quite easy to get some ~10uH together, just from stray wiring inductance.  (Remember, every wire has inductance!  Inductance is a property of space itself, and length through space incurs inductance.)

So, simple solution is a TVS from GND to drain, say an SMAJ18A which will avalanche reliably (TVS diodes are made to handle repetitive avalanche, and are basically unlimited, other than, obviously, overheating and melting into a lump).  That should do for most any load; if you need higher currents and much higher inductances (maybe say for motors), a larger diode like SMCJ to SMDJxx5.0 can be used.  (You'll probably be using multiple transistors in parallel too, since the IRL2203N is only rated 75A for the package.  Yep, they put that helpful little fact into the fine print. Lovely of them, huh?..)

That handles worst case turn-off.  Note that a capacitive load (not that one really exists at these high currents and short time scales?) isn't a problem, you turn off, voltage kind of sits around, or rises slowly, no problem.

Turn-on is partially handled by the circuit itself, i.e. even if the load is heavily capacitive, it will be turning on slowly (fractional ~ms?) so might not be an issue, but do keep in mind the transistor is dropping somewhere between full voltage and none (saturation), while it's picking up that current.  So it can again dissipate a lot of power that way.  If the load is inductive, the transistor may saturate (or somewhere inbetween, if the load is complex!), which is fine.  So, as is often the reciprocal case -- capacitive turn-on and inductive turn-off are worst.

Finally, a note on oscillation.  Putting low impedances (especially capacitors) on MOSFET gates is generally a bad idea.  So, C4, or the suggested zener clamp above.  (Yes, even the ~100pF of a zener diode can matter!)  The low impedance forms a resonant loop between gate and source terminals, powered by the drain and biased by the slowly-changing gate voltage (and it's always slow, even with a fairly fast gate driver: oscillation can occur in the 100s of MHz, while you're lucky to get a gate rise/fall time of 20ns; several cycles of oscillation can still occur).  So, simple solution, add a few ohms at the gate pin, to dampen this path.

Extra gate resistance can be used to further slow the rise or fall time (and, rise and fall can be controlled separately by using a parallel diode, in series with another resistor).  Probably not important here, so, a random 10-100 ohm would be fine, but handy in general.

Tim

[Terry Bites]

Use a free circuit simulator package like LTspice or Microcap to determine the operation of your circuit. Or knife and fork your way through the maths. As a start Io*Rs*Av1 is the voltage at the input to the comparator. When this excedes the comparator Ref (I'm not sure the TL431 works properly like this) then Q3,Q4 and Q5 are on and the MOSFET is off. R2 can connect directly to the comparator output. The input filter can be removed and replaced by simply by putting a cap across R10. f=1/(2pi()CR) as ever. You could put some back to back diodes across the sense resistor to protect the opamp (overkill?)

The amplifier Q3 Q4 serves no purpose, the gate drive is fixed current is set by R5. To get a delay, dont slug the output with 100n, create a delay before the gate driver stage or Q2. C4 will stop the Mosfet from switching cleanly.  The supply will be 5V or less with this opamp so its likely regulated. I'm thinking that most current limits dont need much precision so the TL431 can be a regular zener or cleaned version of Vcc potted down. The comparator will be very sensitive to noise even with the input filter. It needs hysteresis and a bit of a rethink. Heres a simple and classic monitor circuit. If you were to use this, the LMV321 will not work. The opamp will need to have inpus CMV to Vcc. Easier to use in this is a RIRO LV amp. Better still, there are plenty of current limit ics that just do the whole thing. Check out some data sheets and figure out how they work.

[CMTan]

I concur with Benta.  This is over-design.

Where is the input to control the load?

The objective is not very clear. 
I am guessing that what you want is to turn on the current to the load, but if the current exceeds 1.8A, the current should be cut off, and the LED is turn on to signal that overload has happened. 

If this is the objective, then there must be a control line for input to on the load switch for current to flow through the load.

[ashubin2005]

Why not use the LMV358, the dual version of the LMV321?

Yes, this good idea for smallest footprint.

C4 is a pretty small cap, but I'm wondering if it still would be a good idea to add a resistor across it to make sure it discharges when you turn off the power.
I wouldn't worry. It will discharge through R5 into U1 and U2, when the power is removed. I doubt there will be more than half a volt on C4, after a few seconds of power down.

I will put an additional resistor next to R5 for accelerate the discharge of parasitic capacitances after turning off the main power.

[ashubin2005]

Incredibly complex for such a simple task.

Please tell an easier way to solve this "simple task"

[ashubin2005]

T3sl4co1l, thank you for such a great description of the comments to my design.
In the first post, I forgot to mention the VCC = 5V.
Power supply for this design may issue max is 2.8A.
The Load in state correct have current in the range from 0.7 to 1.5A.
Load type: inductive.
If the current Load increases above 2A, this state Load is failure. In this state must Load be protected from further self-destruction.

Points of interest for a circuit like this:
- How fast does it act?

I soldered this circuit to test. Given the poor wiring (R6,C5 is none), I got a response time of about 10.5uS-14uS. Next, I will describe the measurement technique. Maybe I'm doing something wrong.

- What does it limit current to, under fault conditions (RL --> 0)?

For protect Load from further self-destruction.

Does it act fast enough to prevent damage (VCC * IL = Pd in the switch, this can only be sustained for 100s µs, maybe a few ms)?

Yes, the resulting actuation speed is fast enough to protect the load from self-destruction.

- What is the startup condition?  (It doesn't look very well defined!)

When Load current is exceeded (limit selected R14 and R10), a latch is activated, which breaks the Load circuit. This state is signaled to the user by led.

The trouble with filtering the sense voltage is, you can't have limiting*, and it needs to be a shorter time constant than the failure time.

Using the low-pass filter (R6C5), it is possible to adjust reaction time response OpAmp for duration of high consumption bursts?
For example, bursts of high current consumption, with a duration of 100 nS, are skipped (in this case it will be important duty cycle of high current consumption pulses).

Note that Q5 turns on pretty hard, it's got about 2mA Ib (again assuming ~10V supply).  This will easily draw 200mA (or more, depends on exact type; I'm assuming BC17 is a typo for BC817 or something?).  Which will discharge C4 pretty quick (dt = C dV/I = (0.1uF) (10V) / (0.2A) = 5us), and Q2's drain risetime will be even quicker (maybe 1 or 2us?).  So if the load's L/R time constant is longer than that, it will fly back and generate peak voltage above VCC.

Thank for this note.
Yes, transistor is BC817.
In the next revision circuit design, I will away from the extra capacitance on the gate.

Q2 is rated for some avalanche, so this likely isn't fatal, but it depends.

Thank you for this note.
In the current application, the maximum operating current will be about 1.5A.
A current of 2A will be considered an emergency mode.
But the behavior of the transistor in avalanche mode interests me.
Please, say what Book/AppNote need read me for understand (interested in the behavior of Mosfet and BJT).

So, simple solution is a TVS from GND to drain, say an SMAJ18A

Thank you for this note. Added 

So, simple solution, add a few ohms at the gate pin, to dampen this path.

Thanks for this note.
Added.
I found AppNote for this theme: https://www.ti.com/lit/an/slla385a/slla385a.pdf
Does it make sense for me to view at something else?

Now, about the method of measuring the response speed.
For measurement i use oscilloscope OWON MSO8202T.
CH1 (RED ray), clamped to U1 input (uses probe mode 1:1),
CH2 (YELLOW ray), clamped to Gate Q2 (uses probe mode 1:10).
Since the voltage supplied from Rsense to U1 is small, therefore I used this modification of the CH1 tip (see attached photo).
See attachment for method of connecting CH1 to the board.
On schematic i disconnect Low Pass filter (R6 and C5) for lack of interference. I create a direct connection U1 to RSense.
The voltage drop on RSense is over 0.125V will be the comparator turn on (U2).
For RLoad i use resistor (nichrome) and turn on this separately via an external mosfet from a button on Gate (button connected via a Schmidt trigger).
On the oscilloscope i set the trigger to 0.125V on CH1. Time reaction is next solve: from the moment the trigger fires to the moment when the voltage at CH1 is zero.
I made 10 measurements using this technique in various circuit modifications.
Did I use the correct measuring technique and time estimate work protection circuit?
The reaction time ranged from 10.5 - 14uS.

Edited circuits and oscillograms in the attachment.
I maked modifications around Gate at Q2.
I really see, how capacitance on Gate affects switching time Mosfet (as a result, and in the overall speed of work protection circuit.)
For the next modification circuit, I will think of a turn-on delay line without increased capacitance on gate Q2.
For my task, the current protection response speed is enough.
But I wonder what methods exist to reduce it?

[T3sl4co1l]

Incredibly complex for such a simple task.

Please tell an easier way to solve this "simple task"

Also curious, honestly.  Unless it's just "use an IC, lol", which doesn't teach much... and, a lot of those are surprisingly poorly available these days.

For reference, this is about as stripped down as I've been able to get it, solving a slightly more general problem (on/off with active limiting and overtemp... oh, this screenshot doesn't show the overtemp, add another transistor for that then).  Mind, "stripped down" in semantic terms, specifically the transistor count.  Current consumption is very low -- better than any ICs you could build equivalent functionality out of (i.e. opamps, comparators, etc.) -- but not nearly as good as a proper purpose-made IC.



There are a number of controller ICs that can do a similar thing, though there are few IIRC with proper current limiting AND programmable SOA.  And by "controller" I mean external transistor, since the integrated kinds all have pitiful SOA (100s µs limiting time -- simply the price of a tiny die).  This for example should be good for, think it was around 7ms at 10A, 30V with the IRFZ44 or 50N06.  (Older types better than newer, for the large die area and low cost.)

I also have a switching based design, capable of much longer fault time at higher current (e.g. 30V 20A 150ms), with similarly low current consumption, and bidirectional operation (so can be used as an inline AC limiter/fuse/switch, or for DC without minding source/load direction); I am NOT aware of any off-the-shelf solution for this particular problem, so it seems a discrete solution is the best option for it.  (Not that it's exactly a big problem, mind.)

Tim

[ashubin2005]

Terry Bites, thank you for the comments to my design.

I'm not sure the TL431 works properly like this

I used the following information from page 19, figure 20 from the datasheet:
https://www.ti.com/lit/ds/symlink/tl431.pdf?ts=1654120833181

R2 can connect directly to the comparator output.

I agree, this note can be used.

The input filter can be removed and replaced by simply by putting a cap across R10. f=1/(2pi()CR) as ever.

I agree, this note can be used.

You could put some back to back diodes across the sense resistor to protect the opamp (overkill?)

This is the need option, I will put the TVS diode

The amplifier Q3 Q4 serves no purpose, the gate drive is fixed current is set by R5.

Q3,Q4 serve for moment of fixing the excess of the consumed current. They "latch" and the Gate U2 is attracted to the ground.

To get a delay, dont slug the output with 100n, create a delay before the gate driver stage or Q2. C4 will stop the Mosfet from switching cleanly.

I see on oscilloscope this delay (see my previous post). In next revision circuit planned not have capacitance on Gate Q2.

I'm thinking that most current limits dont need much precision so the TL431 can be a regular zener or cleaned version of Vcc potted down.

I agree, this note can be used.

The comparator will be very sensitive to noise even with the input filter. It needs hysteresis and a bit of a rethink. Heres a simple and classic monitor circuit. If you were to use this, the LMV321 will not work. The opamp will need to have inpus CMV to Vcc. Easier to use in this is a RIRO LV amp. Better still, there are plenty of current limit ics that just do the whole thing. Check out some data sheets and figure out how they work.

How can I organize hysteresis in my circuit?
What will be better: additional capacitance at C10 or a recalculation this low-pass filter?
Where did you get these sample circuit ?
Do you have a link to e-book ?

[T3sl4co1l]

Points of interest for a circuit like this:
- How fast does it act?

I soldered this circuit to test. Given the poor wiring (R6,C5 is none), I got a response time of about 10.5uS-14uS. Next, I will describe the measurement technique. Maybe I'm doing something wrong.

Heh... those points were, more rhetorical in nature, or to motivate design, not as a direct review of the present circuit.  But I suppose that works too.

The time, by the way, comes from the "comparator".  Check the output pins and I think you will see what the response time is based on.

Much faster components can be used, for example an LM311 (no current sense amp will be needed), a 74HC02 wired as R-S flip-flop, and gate driver IC e.g. TC427 will do the job in under 100ns.  (Note: the symbol for seconds is lowercase 's'; 'S' is siemens, a unit of conductance.)  Much faster than that, really isn't going to be very interesting / useful, but could still be done in some 10s of ns, maybe single digit ns, if you really had to.

The main thing with very fast detectors is, it doesn't take much charge at all to deliver that kind of peak current, in that short of a time; for an inductive load, that should be fine still, but it doesn't take much capacitance before it can't turn on at all (peak current reached while charging the capacitor), or from nuisance trips from, say, ambient noise, ESD, that sort of thing.

But the behavior of the transistor in avalanche mode interests me.
Please, say what Book/AppNote need read me for understand (interested in the behavior of Mosfet and BJT).

https://www.vishay.com/docs/90160/an1005.pdf
https://toshiba.semicon-storage.com/info/docget.jsp?did=59466

https://www.onsemi.cn/pub/Collateral/AN875-D.PDF

BJTs behave differently; turn-off is basically like diode reverse recovery, there is some delay time before turn-off (base current negative, i.e., charges being removed from the junction), and then the junction becomes less conductive, its breakdown voltage rising over time, eventually reaching ratings.  The curves of voltage vs. time are given in dynamic SOA or RBSOA curves, and often given for HV switching BJTs, but rarely if ever for general purpose power or signal transistors.

MOSFETs turn off basically as fast as you can drive them; BJTs are limited by this behavior.

MOSFETs are a fine choice for this application, as the gate consumes no DC power and the voltage drop can be very small.

Power BJTs are mainly chosen where cost is a primary motivator, as they have higher current density (= smaller chip inside) for the same ratings; but they don't switch as fast, so tend to run at lower frequencies (say, for switching supplies in the 30-100kHz range, while MOSFETs are perfectly fine at 300kHz+).

Or for linear power amplifier applications, where adequate ratings and ease of use dominate.

Did I use the correct measuring technique and time estimate work protection circuit?
The reaction time ranged from 10.5 - 14uS.

Yes, that sounds reasonable, in line with expectations.

Tim

[ashubin2005]

The input filter can be removed and replaced by simply by putting a cap across R10. f=1/(2pi()CR) as ever.

The replacement circuit in attachment. In the case of a lot of noise at the input of the op-amp, Cf will shunt R10. As a result, the gain of the op-amp will decrease. As a result of reducing the gain, the system will not be able to detect a large current and will not work as expected.
Did I draw the right conclusions?

To get a delay, dont slug the output with 100n, create a delay before the gate driver stage or Q2. C4 will stop the Mosfet from switching cleanly.

Yes, that's a good idea. On the measurements in the previous post, I noticed how the extra parasitic capacitance gate affects the switching time.
In the new schematic revision i made a delay line without add capacitance on Gate Q2.

The comparator will be very sensitive to noise even with the input filter. It needs hysteresis and a bit of a rethink.

I looked TI's AppNote about this. Now I have an understanding of how it works. But I guess I'll save that for another time.
In the current application of this circuit, the hysteresis is provided by the some moment Load work.
The Load in state correct have current in the range from 0.7 to 1.5A.
Picking up the gain for op amp U1 to the reference voltage level of op amp U2 for a Load current margin of up to 1.8A will allow me to organize a guaranteed stable operation for state "Normal" and "Fail".

[ashubin2005]

Modified the circuit.
Thanks to the advice of T3sl4co1l and Terry Bites, I added some changes.
Most importantly, the capacitance for the turn-on delay on the gate of Q2 was removed.
For Q2 made a turn-on delay on transistors Q5 and Q3. Transistor Q7 is responsible for quickly discharging capacitor C5 after the power is turned off.
TVS D3 was also added.

[ashubin2005]

The time, by the way, comes from the "comparator".  Check the output pins and I think you will see what the response time is based on.

I measure the time from the moment the current consumption was Load exceeded to the moment the Load was turned off.
Thus, I find out how quickly this circuit works.

Thanks for the advice on how to speed up the response time of the circuit, as well as about the consultation of the behavior of the transistor in avalanche mode.
I'll look into this last issue in the coming days.

[ashubin2005]

For reference, this is about as stripped down as I've been able to get it, solving a slightly more general problem (on/off with active limiting and overtemp... oh, this screenshot doesn't show the overtemp, add another transistor for that then).

Very accurate and difficult work circuit engineer.
My respect !