Thank you all,
I will post the layout as soon as I get back to the office.
In the meantime, I was wondering... If I have a USB pair running over a solid GND plane (i.e. no slots or cuts in the GND plane) that spans the entire length and width of the traces and below a power plane that covers only part of the length of the USB traces, would that increase the emissions significantly?
Thank you
The ground needs to be wider than the bus, by several trace-plane (substrate height) spacings, preferably trace widths as well (whichever is higher). And, if we're talking a strip of ground, with microstrip on top, and less-well-specified stuff on the bottom, then we may want to be concerned about the fields around the whole thing. Like if you launch these traces onto a flex circuit, having the specified geometry, now there's a loop between that cable and the surrounding space that can pick up common mode, and maybe that couples into the signals at one end or the other.
But given that limitation, yes, that's absolutely fine. As long as the ground plane is wide enough, and at frequencies where it's an adequate shield (so, some MHz up, more or less), the traces on top don't care what's going on underneath.
That means you can still have interference at lower frequencies, where ground isn't such a good shield. The ground impedance will be lower at those frequencies too, so it takes larger currents to cause such interference; a good reason to avoid routing under an SMPS, for example. Go around instead, steer around the close-in current loops of that section. Or if you have a pathological example, like this narrow strip of GND, carrying just this data pair, over a the-floor-is-lava patchwork of nasty power planes and unrelated (noisy) grounds -- that's more like the flex-cable case, with it taped down to a bunch of other nodes that therefore capacitively couple into it, and who knows what that's going to do to the common mode (and in turn CM-DM coupling), like, maybe you'd want to lift one end of it and put the whole thing (GND wrapped around data pair!) through a ferrite bead or something, to help relieve what would otherwise contribute to GND-loop current.
Or say this "pair on GND strip" pseudo-cable is routed circuitously around the board, and because it's still "GND" (net), a connection is made lackadaisically back to bulk GND elsewhere on the board -- creating a large open loop, exposing it to fields (again, mostly of importance at lower frequencies, where the shielding value of the GND layer is less).
The most common case, I would say, is a whole board poured with GND, and it doesn't much matter what power domains are on the bottom side of that, with respect to traces on the top. The most common case of which is probably 3.3V poured most everywhere. Which, as long as the supplies are well bypassed to GND, it doesn't even matter much which layer the pair is routed on.
And, vias don't add much trouble either at these frequencies; that's more something you need to watch out for in the 3Gbps+ range.
There is still the separate matter of microstrip radiation, which is generally low for average PCB microstrip dimensions and lengths, but is a nonzero effect. It's normally not an issue for typical signaling standards and commercial emissions thresholds. If you needed an extra 20dB lower emissions, or need to pass particularly sensitive tests (of various kinds, not necessarily regular radiated emissions), you may find (buried) stripline or shielding (or a metal enclosure) is required.
Which...
I will clarify my statement: every differential pair radiates and the radiation depends on the loop area. In case of a differential pair designed as a microstrip onto a PCB with a spacing <1mm and perfect impedance matching along its length, the radiation is insignificant when measured at a distance of 1m.
That's more like it
There are a few more provisios missing here -- trace length vs. signal frequency, how it's looped around if at all, if there are any resonances or stubs, etc. For the usual case -- and to be perfectly definite, equipment like embedded and small computer boards, typical interfaces used therein (LVCMOS at lower rates, LVDS or similar for wideband), and typical test levels (say FCC Part 15), that can be a passing combination.
The key insight is that, any trace exposed on the surface of the board, is a patch antenna. Being narrow, it doesn't couple very much into radiation, but if it were unterminated, quite a bit of radiation resistance could be resolved in its impedance, for example. If terminated, one loses the multiplication effect of resonance, and radiation resistance will be a small fraction of Zo; but, indeed, nonzero.
I don't actually have numbers for this; I suppose it's just as well, because modeling radiation simply requires too many variables anyway, and it's best to test. (I also don't have any RF/field simulation tools to model it.) To be sure, most intentional antenna structures do so with much wider patches, or as traces over a ground-free patch (BT/WiFi meander or 'F' type antennas being a commonly seen example). And, given that typical signal levels (some volts at up to maybe ~100MHz, i.e. where LVCMOS becomes inconvenient to use, or 100s mV at ~GHz, where LVDS dominates) typically pass commercial levels (in the 30-40dBuV/m ballpark), under standards such as CISPR 22.
Anyway, differential has the bonus that, as long as CM is small (it can be ~mV from typical transmitters), the active area is not so much the full width of the pair, but the quadrupole made between them and the surrounding ground plane. Quadrupoles drop off even faster with distance than dipoles, so the near field can be quite low level. Still nonzero, of course -- and one of the limiting factors of PCB pairs is, they're almost always parallel, i.e. if you look at a PCB from a distance, with a pair running straight along its length, then PAIR_P is always on top and PAIR_N is always on bottom, and that polarity is sensible at a distance with some dipole moment (just with zeroes at more angles because it's actually a quadrupole). It's harder to make a twisted pair (i.e. swap +/- periodically along the route) because vias are generally worse for signal quality than the radiation concern is
...Mmm, or maybe it is an overall dipole characteristic still, because a quadrupole would be +/-/+/-, whereas this is 0/+/-/0. Think maybe it's a sum of both cases? Because you could have four points (x+y, -x + y/2, x - y/2, -x - y) as the superposition of a dipole and quadrupole, with the same resulting arrangement. Ah yeah, that makes more sense. Hey, I remember electrostatics...
Well then in that case, the dipole of course dominates; but it's less than unshielded untwisted pair (e.g. ladder line) because the ground plane shorts out much of the dipole. It's an intermediate case.
Causes for radiation from a differential signals:
1. Rise and fall time mismatch in the drivers.
2. Timing differences in the drivers.
3. Amplitude differences in the driver.
4. Asymmetry in the differential pair.
5. Impedance mismatch. (wrong cables attached)
6. Coupling onto shields or other things nearby because of the loop area / distance ratio.
7. Common mode noise present on the reference plane.
https://ewh.ieee.org/r6/scv/emc/archive/2013/January/012013Sam_Connor.pdf
This is a good primer, at least on topics; I assume it's just slides that went with a talk which gives more detail about things.
Actually... p.38 in part answers the question raised above (distance from plane edge) -- it's in terms of skew (propagation delay), but similar compromises to impedance matching and CMRR occur. Oh, this is actually good data down here (pp.30-40 range say) too. Nice!
Like, as you can see, the effect of GND via placement is tiny: fractional percent. This isn't relevant to commercially-important standards that are designed for messy on-PCB use, like PCIe and USB -- not to say improvements aren't nice, but also, there's no reason to go out of your way and build everything on Rogers laminate with perfect geometry and everything, that's the whole point of them is to handle modest errors like this. Likewise, the CMRR might be comparable, like in the 40 to 60dB range, so it helps that signals start in the -20 to -10dBV range (~100mV), i.e. 100-110dBuV, so that by the time they might radiate to space, they're down in the 40dBuV range. And, give or take field strength and wavelength, that can be comparably in the 40dBuV/m range as well.
It is however relevant to extremely sensitive signals, for precision (~fs jitter?) timing, high purity RF measurements, etc. If you can reclock your signals, and decode line codings, and all that stuff -- please do, by all means! -- but in the few cases where you absolutely cannot, yeah, such lengths are worth going to. (Being this guy works at IBM research, that's a pretty understandable motivation!)
Or, not entirely sure what's going on in the pp. 48-55 range -- think there's some context missing here that would be in the talk. Like, why they're looking at these approaches in the first place (explaining because someone else suggested them? suggesting them for potential albeit narrow application? etc.), or what they expected to find, or if it's just throwing spaghetti to see, etc. Sometimes weird things can help (like the EBG structure to get filtering in narrow band(s) only), other times you kinda just have to shield and that's all you can do. (USB is kind of that way, due to its use of the common mode, albeit at lower frequencies than this doc is concerned with -- 100s MHz instead of GHz.)
And, balance is hard to construct and maintain, as I think this document kind of illustrates in part; which, it would also be worth asking what the test setups looked like, like for the asymmetric ground via tests, how exactly do you get a 120dB isolation fixture in the first place? That's actually a very good question, but also out of scope of a mere talk; we have to assume that it was characterized as such, but if you're going to rely on these data, you might want to contact the guy to see how that was all done.
Anyway, balance is an issue even for Ethernet magnetics, which -- granted, they're only targeting the minimum requirements of the standard (IEEE 802.3xxx) so you'll never see parts that wildly outperform the standard -- but the standard is similarly somewhat relaxed with its specs because it must be commercially practical: not terribly expensive to implement, nor sensitive to, like, cable placement and stuff. If the Ethernet signal level was 10V for example, you might get significant mode conversion and thus radiation just from touching a cable (some turns of the twist closer to your hand than others), and, to be clear I don't mean the
amount of mode conversion varies with amplitude but that the total system, amplitude and conversion gain and radiation all included, would exceed threshold. (Another of those regrettable things with language, it's so tedious to speak precisely about these topics.)
Anyway, referring back to your list of points -- and specifically with respect to USB -- USB packets start and end (or just end? I forget exactly, hey it's not like I ever have to
implement the thing okay?) with the SE0 symbol, which is both lines low -- a common mode symbol. CM filtering corrupts this symbol, causing malformed packets and communication errors; likewise, USB can't simply be sent down UTP through free space, because not only would that CM impedance mismatch, plus and ambient noise, corrupt the SE0 symbol, but the symbol would radiate as well.
I have some USB cables right now actually, that I'm not sure how exactly they're failing (frayed braid? fretted connector?), or which ones even are affected, but I've got some ~10s mV of noise on my bench and it goes away when I unplug my USB hub. It looks like low frequency noise (impulsive in the 100s kHz sort of range, at a center frequency in the ~10MHz range -- cable resonances basically, fed by data crossing over a poor ground). And that low frequency, AFAIK, corresponds to packet transmission. It's erratic (noisy) because it's data, of course.
because of the nature of USB, this doesn't really matter. A CMC (as such) gives a better eye diagram during the data packet, but doesn't do much overall. At best it's an average-case improvement with a worst-case impairment. It's a statistical sausage effect: tighten one aspect, the other expands.
Adding separate components onto both signals like ferrite beads and capacitors will create some asymmetry. Because of that I'm thinking that a CM choke will cause the least disturbance. Nonetheless, inserting "random" components into differentials signals isn't going to work very well.
As stated by jkostb who wrote the below quote while I wrote my post:
Blindly adding ferrite beads and common mode chokes is usually not the way forward for solving these emission issues.
You might make things worse and perhaps solve the EMI problem but now the interface isn't always working properly on every device.
Yup. And, as with the Ethernet example -- even when you try and balance things, you can't do a perfect job, not with commercially available parts at least. A CMC will always have more wire to one side or another, or even, like, Idunno, inhomogeneity in the ferrite itself I guess, why not?; and you can't LC filter it (even when you can afford loading C on the line) because even if you use 1% precision capacitors, that's still a 40dB expected imbalance!
Tim
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