EMC test with 480MHz peak? Any ideas?

[ricko_uk]

UPDATE (OP further below)

Hi,
I am modifying the PCB and adding as many EMC improving suggestions mentioned above as possible.

Because the peak is at 480MHz I am thinking of adding ferrites on the USB data lines too. I didn't find much info about this solution online but I did find this app note: https://www.ti.com/sc/docs/apps/msp/intrface/usb/emitest.pdf   And attached is a screenshot from page 5.

- Nctnico in his reply above suggested to place the ferrites near the IC (which I assume makes sense so it stops emissions right at the IC pins) but the attached app note shows the ferrites next to the connector. Any thoughts on why they would be better near the connector? Do they put them near the connector because in that app note they have the termination resistors next to the IC (and they would cause some issues if placed next to the resistors in terms of affecting the impedance perhaps)?

- On the LAN9514 that I use the termination resistors are inside the IC (as per second screenshot attached). Where would you place the ferrites?

- I am thinking of adding also a USB CM choke on the USB data lines (just in case to test). Where should I place it? At the IC side before the ferrites? The IC side after the ferrites? The connector side?

Thank you as always



ORIGINAL POST

Hi,
I ran a PCB through EMC pre-compliance and it relatively quiet across the spectrum but has a massive peak (5dB below the limit line) at 483MHz. And another at 345MHz. Graph attached.

For the 483MHz peak my first thought was the USB2.0 but there are no USB peripheral connected nor any wires (not USB nor anything else apart from the external brick-type PSU. So the USB hub (LAN9514-JZX) should be completely off. Or does it still send bursts of small data to detect if there is a device attached?

If not that, chat else could it be?

This is the list of all peripherals and clocks:

Compute module (its own clock throttling from 600MHz to 1.2 GHz)
LAN9514-JZX Ethernet/USB 2.0 hub running at 48MHz. It has a USB "input" and ethernet and 4 USBs as "outputs"
Various switcher PSUs (only a few hundreds of KHz)
HDMI (frequency selected by the Compute Module so no idea but I don't think 480MHz is it)

Any suggestions perhaps also looking at the other peaks on the graph?

Thank you

[srb1954]

Hi,
I ran a PCB through EMC pre-compliance and it relatively quiet across the spectrum but has a massive peak (5dB below the limit line) at 483MHz. And another at 345MHz. Graph attached.

For the 483MHz peak my first thought was the USB2.0 but there are no USB peripheral connected nor any wires (not USB nor anything else apart from the external brick-type PSU. So the USB hub (LAN9514-JZX) should be completely off. Or does it still send bursts of small data to detect if there is a device attached?

If not that, chat else could it be?

This is the list of all peripherals and clocks:

Compute module (its own clock throttling from 600MHz to 1.2 GHz)
LAN9514-JZX Ethernet/USB 2.0 hub running at 48MHz. It has a USB "input" and ethernet and 4 USBs as "outputs"
Various switcher PSUs (only a few hundreds of KHz)
HDMI (frequency selected by the Compute Module so no idea but I don't think 480MHz is it)

Any suggestions perhaps also looking at the other peaks on the graph?

Thank you

Get yourself a set of near-field probes and scan the PCB to see if there any hot-spots corresponding to the frequencies of your problematic emissions.

It may also be useful to do alternate scans with the spectrum analyser set to average and peak mode. Comparing these scans against the the QP scans may give some clues as to whether the emission is continuous from a clock source or intermittent from I/O activity.

[nctnico]

Get some near field probes indeed. But the LAN9514 is definitely a trouble maker. Needs very careful layout, locally filtered power supply (through beads and dedicated analog power plane) and 10 Ohm (@100MHz) beads on the ethernet signals to make it quiet enough to pass EMC testing with an ethernet cable attached. Been there done that.

[langwadt]

the USB hub probably has its PLL running even with nothing connected

[SiliconWizard]

That's almost for sure.

Now what would help would be to selectively shut down the various peripherals of this board until the peak disappears. The 480MHz peak is high enough that testing this even with a simple antenna and an entry-level spectrum analyzer should be enough to find the culprit, before going back to the EMC lab.

[ricko_uk]

Thank you all!

About the near field probes, I am waiting for the spectrum analyzer so will try that next week. And will also try selective IC shutdown.

@Nctnico,
I already placed plenty of ferrites on the power lines as per datasheet and app notes. But the "10 Ohm (@100MHz) beads on the ethernet signals" is interesting. So some questions:
1) You mention ferrite beads so I assume on the PCB and in series / inline on the traces going to the connector, correct? I am asking because I have never seen that and could not find anything on online. If you meant on the cable then we already tried and not much difference.
2) If you mean to place them inline between the IC and the connector, should I place them near the IC or near the connector?
3) about the ferrites, I did place ferrite beads on the power lines. As you can see from the attached schematic, I placed 1 single ferrite for each rail and then between the ferrite and each one of the power pins bypass caps. Would you recommend a different configuration?
4) if you remember, in your design, roughly how many dBs did you manage to improve by after your suggested solutions?

Thank you.

[nctnico]

I'd change the capacitors to 50V. 6.3V capacitors will have lost 90% of their capacity at 3.3V. Change the 47uf ones to two 10uf 25V 0603 for example. Also add a few 10nf 0402 decoupling capacitors that go close to the analog and digital supply pins.

The ferrite beads are inline with the ethernet lines (Wurth 74279274 ) near the chip. See attached schematic



Also make sure to have some ethernet TVS diodes at the PHY side of the transformer to catch peaks that may enter from the ethernet line. The LAN9500 is easy to damage.

I forgot how much dB the emissions go lower but I remember it was quite a bit. I choose the ferrite beads specifically to have most of their attenuation at frequencies over 200MHz.

However, your 480MHz peak may come from somewhere else on your board. Consider the above as an improvement but it may not solve the problem with the 480MHz peak. You'll need to do some measurements using a spectrum analyser & near field probes in order to hunt down the source of this peak.

Recently I had a similar problem and it turned out a pin driving a clock signal that runs for a long distance over a board was set to maximum drive and fastest switching. That needed a bit of software tweaking to reduce the drive strength.

[ricko_uk]

Thank you Nico!

[jwet]

The other thing to investigate is stuff related to wavelength- at 480 Mhz, lambda in air is 24".  In PCB with er of 4 its -12" (/root (er))- these kind of numbers of even fractions of them along the perimeter of a board can make an efficient radiator/antenna.  I have had issues with boards acting as efficient "slot antennas" radiating at the edges.  You could have a weak 10th harmonic of your USB oscillator, etc and an efficient antenna and it becomes visible in a test.  As a test, if possible, scrape some soldermask off and go around the edges with copper tape soldered down at intervals of a cm or so.  The real fix would be to spin the board and put a grounded copper perimeter on all layers and stitch them together vertically with VIA's.  You might be able to see some of this with your EM probes and an SA.  Good luck.

[T3sl4co1l]

I'd change the capacitors to 50V. 6.3V capacitors will have lost 90% of their capacity at 3.3V.

How would you know without a BOM?  Or size even?

Tim

[nctnico]

I'd change the capacitors to 50V. 6.3V capacitors will have lost 90% of their capacity at 3.3V.

How would you know without a BOM?  Or size even?

Any cheap 6.3V MLCC will lose close to 90% of the capacitance in any size at over 50% of the rated voltage. Unless you are using some kind of boutique part. Realistically you won't be able to place anything larger than 0603 close enough to the chip the OP is using (interleaved top/bottom). 0402 size (or smaller) is a more logical choice and thus most likely. The schematic I posted shows 100nf 16V 0402 because it is about a decade old already. Nowadays I specify 100nf 50V 0402.

[T3sl4co1l]

The voltage rating is irrelevant -- it's a breakdown rating, much like the thermal DC rating of ferrite beads.  Like ferrite beads, the saturation depends more on body size than anything else.  Look up the characteristic curves of your favorite types some time (if they publish such data at all(!)) -- be prepared to be surprised!

Tim

[ricko_uk]

BTW, looking at the schematic above shared by nctnico, would a pair of data line CM chokes work better instead of 4 ferrites (one on each single line) to reduce emissions?

Thank you

[Siwastaja]

Any cheap 6.3V MLCC will lose close to 90% of the capacitance in any size at over 50% of the rated voltage.

This is just wrong. Voltage rating is nearly irrelevant; better metric is volumetric energy density, in other words, too-good-to-be-true capacitance in small package means the C will drop more under voltage bias. This is absolute voltage; physics do not care about the voltage rating, and say 6.3V and 25V X7R MLCCs in 0402 package are manufactured the same way, could even be the same part! In other words, if one keeps the same package size (including height!) and picks an MLCC rated to higher voltage, they likely won't see any significant improvement in the actual C under their DC bias, even if it goes from 50% to 10%. Going for a taller package will of course help; or for modest improvement, going through all manufacturers who publish the data and pick one that performs the best.

[tszaboo]

I'd change the capacitors to 50V. 6.3V capacitors will have lost 90% of their capacity at 3.3V. Change the 47uf ones to two 10uf 25V 0603 for example. Also add a few 10nf 0402 decoupling capacitors that go close to the analog and digital supply pins.

There is no correlation between capacitance loss at a voltage, and voltage rating of a ceramic capacitor.
There is a very good correlation between size and capacitance loss, bigger parts will lose less.
Play around in a bit in redexpert (since you already menationed würth) to see it.

mod: And now I see this was mentioned by others, didn't mean to gang up on you.

[T3sl4co1l]

BTW, looking at the schematic above shared by nctnico, would a pair of data line CM chokes work better instead of 4 ferrites (one on each single line) to reduce emissions?

Thank you

Maybe. Not really any way to tell; depends on phase of the noise between pins, and phase response of the magnetics (which likely is poor, this far above design frequency).  And trace matching and other balance factors.

That is, at 480MHz, the magnetics probably have poor CMRR, which is to say, the mode conversion is significant.  So it may not matter much that the pins are in phase (where a CMC would help) or not.  (I mean, if the pins are in phase, a CMC will still help; but it might not help as much as you would hope, because of the as-yet unknown impedance looking into the transformer(s) at this frequency. Or, maybe it's better with the caps on the other side of the FBs.)

FBs, or other normal-mode filtering scheme, is better to the extent that: 1. you don't know the phase of the noise between sources (pins), or subsequent network (i.e. the magnetics); and 2. the desired signal is lower bandwidth (i.e., ~50MHz) so you can afford to use a simple normal mode LPF.

Tim

[nctnico]

Any cheap 6.3V MLCC will lose close to 90% of the capacitance in any size at over 50% of the rated voltage.

This is just wrong. Voltage rating is nearly irrelevant; better metric is volumetric energy density, in other words, too-good-to-be-true capacitance in small package means the C will drop more under voltage bias. This is absolute voltage; physics do not care about the voltage rating, and say 6.3V and 25V X7R MLCCs in 0402 package are manufactured the same way, could even be the same part! In other words, if one keeps the same package size (including height!)

But that is the thing: the higher voltage parts are bigger and will hold their capacitance better. Check these (absolutely randomly picked) Murata 100nf 0402 capacitors for example:
https://www.murata.com/en-global/products/productdetail?partno=GRM155B31H104KE14%23
https://www.murata.com/en-global/products/productdetail?partno=GRM152B30J104KE19%23

The 6.3V version is at -20% at 5V while the 50V version is at -20% at 10V. I'll admit that these samples look better than I expected (also due to the relatively low capacitance) in this case but still you can't trust what an assembler will pick from their stock. Voltage rating is something you can use to steer selection though.

[nctnico]

BTW, looking at the schematic above shared by nctnico, would a pair of data line CM chokes work better instead of 4 ferrites (one on each single line) to reduce emissions?

No, there is already a common mode choke in the transformer. But that doesn't help for signals that are not differentially coupled into the lines. The output stage of an ethernet phy is using pulses (call it a crude PWM) to create the signals. On the cheaper phys, these leak high frequency content onto the lines.

[T3sl4co1l]

Well yeah, those are 0.2 and 0.5mm thick, you're proving the point.

Compare these instead:
https://www.murata.com/en-global/products/productdetail?partno=GRM152B30J104KE19%23 (your example)
https://www.murata.com/en-global/products/productdetail?partno=GRM152B31A104KE19%23 (fair comparison)

Conversely, compare these:
https://www.murata.com/en-global/products/productdetail?partno=GRM155B31H104KE14%23 (your example, thick)
https://www.murata.com/en-global/products/productdetail?partno=GRM155B11A104KA01%23 (fair comparison)

Surprisingly, the HV one still does outperform, though only by a small margin: -16.7 instead of -24% at 10V.  So they probably are constructed differently; perhaps the ceramic has to be higher density to withstand 50V, whereas they can get by with a lower grade for the lower voltage rating.

The size difference is even more stark in high voltages, where the ceramic is a more reliable insulator (thicker layers to begin with), and parts can be -90% at rated voltage.  IIRC, values in X7R from 47nF to 470nF (about the most they advertise) in 630V 1210 are pretty consistently 20-30nF at rated, with the actual value still going up as you go up in rated value, but at a sub-linear rate.

Tim

[nctnico]

Well yeah, those are 0.2 and 0.5mm thick, you're proving the point.

No. The point is, higher voltage rating = more likely you get MLCC capacitors on your board that keep their capacitance at their working voltage. For larger capacitances this becomes even more important. Typically I don't specify the exact type of MLCC capacitors because there are so many of these out there that every assembler will ask whether they can substitute their random part with the part number you have specified. I just make sure the cheapest part I can find meets the specs. It only gets better from there. Some of my designs are produced by by 5 to 6 different assemblers over their life span so do the math to the amount of work it adds up to versus the cost that is saved. IOW: the more universal your specification for a jelly-bean part, the easier you make your own life.

[ricko_uk]

Thank you both

[ricko_uk]

Hi,
I am modifying the PCB and adding as many EMC improving suggestions mentioned above as possible.

Because the peak is at 480MHz I am thinking of adding ferrites on the USB data lines too. I didn't find much info about this solution online but I did find this app note: https://www.ti.com/sc/docs/apps/msp/intrface/usb/emitest.pdf   And attached is a screenshot from page 5.

- Nctnico in his reply above suggested to place the ferrites near the IC (which I assume makes sense so it stops emissions right at the IC pins) but the attached app note shows the ferrites next to the connector. Any thoughts on why they would be better near the connector? Do they put them near the connector because in that app note they have the termination resistors next to the IC (and they would cause some issues if placed next to the resistors in terms of affecting the impedance perhaps)?

- On the LAN9514 that I use the termination resistors are inside the IC (as per second screenshot attached). Where would you place the ferrites?

- I am thinking of adding also a USB CM choke on the USB data lines (just in case to test). Where should I place it? At the IC side before the ferrites? The IC side after the ferrites? The connector side?

Thank you as always

[T3sl4co1l]

Notice if you don't have a metal enclosure as EMI shield / plane, the PCB becomes it, and the USB shields must be (at least AC) grounded to the PCB.

USB can't support very much CMC due to its inherently unbalanced design (SE0 symbol is common mode).  The maximum is about 80-120 ohms (@100MHz) for High Speed, or 200-300 ohms for Full Speed.

Any noise filtering for incidental purposes (like the LAN noise symptom mentioned above) can potentially use smaller value FBs, or an LC lowpass configuration (with small caps, and lossy L using FBs).  You may want to evaluate comm signal quality (potentially requires a standards-verifying USB/Ethernet/etc. tester, or pattern generator + fast scope to measure the eye diagram directly) while testing EMI response.  Which, is probably a PITA, but that would be ideal.

Tim

[ricko_uk]

Thank you Tim

[temperance]

Can you post a pictures of the layout of each layer?

-Are the diff pair signals matched in length because a perfect diff pair doesn't radiate. Timing alone is not what you're after with respect to USB timing requirements. From a radiation point of view a 100ps mismatch does make a difference because the return path becomes undefined at the signal edges, causing radiation.
-Beware when adding filter components onto a diff pair to not create asymmetry (including component tolerances) undoing your length matching.
-Are the USB cables attached to your board of good quality? Some cheap cables and even some fancy expensive cables claiming excellent signal fidelity are pretty bad. Cut one open if in doubt. Some are just straight pairs instead of twisted.

An app note from TDK with some practical advice regarding CM filters:
https://product.tdk.com/system/files/dam/doc/content/emc-guidebook/en/eemc_practice_02.pdf