How to address I2C slaves with conflicting addresses?

[zapta]

I want to design a circuit with an ATMEGA328P MCU (5V, 16Mhz) and a few LTC2943 (2, 4, or connected as slaves on a single I2C bus (5V, 400KHz). 

The problem is that the LTC2943 has a fixed I2C address so connecting more than one on the same I2C buss will result in a conflict.

Any idea for a simple/compact circuit that will allow to select an individual LTC2943 at a time?  The ATMEGA328P has free i/o pins, possibly even one pin per LTC2943 slave.   This application is not price sensitive.

[mikeselectricstuff]

Common SCL and an SDA per chip, or a multiplexer (e.g. 405x analogue mux) to mux the SDA lines.
Or common SDA, and mux SCL as it's unidirectional, e.g. using a 74HC138

[suicidaleggroll]

Common SCL and an SDA per chip, or a multiplexer (e.g. 405x analogue mux) to mux the SDA lines.
Or common SDA, and mux SCL as it's unidirectional, e.g. using a 74HC138

I agree on the analog mux.  A 4051 on the SDA line should work fine, as long as the pullups are weak enough that the ~200 ohm series resistance doesn't cause a significant voltage drop.

SCL is not unidirectional, I don't think the 74HC138 approach would work correctly.

[opty]

That is a pity there is no 'enable' input either...

[zapta]

Common SCL and an SDA per chip, or a multiplexer (e.g. 405x analogue mux) to mux the SDA lines.
Or common SDA, and mux SCL as it's unidirectional, e.g. using a 74HC138

1. I am using the AVR hardware I2C so SDA per chip will make things complicated. 

2. Analog mux'ing the SDA looks good. I presume I need to have a SDA pull up for each slave, on the mux N side, right? 

3. Is the SCL active only during transfers?  If it's continuous, I would prefer not to switch it asynchronously.  Since it's unidirectional, I presume I can use standard logic mux or 1:N decoder (non OC) and have a resistor only on the master side. Is it right

[zapta]

[SCL is not unidirectional,

How come? Even if there is only a single master on the bus?

[suicidaleggroll]

[SCL is not unidirectional,

How come? Even if there is only a single master on the bus?

Yes even if there is only a single master.  I2C slaves are allowed to manipulate the clock to communicate their current status back to the master.  It's called clock stretching.

[suicidaleggroll]

2. Analog mux'ing the SDA looks good. I presume I need to have a SDA pull up for each slave, on the mux N side, right?

As far as the master is concerned, a single pull up on the master side of the mux would be fine.  I'm not sure what the effect of clocking SCL with a disconnected SDA would be for the "unselected" slaves though.

[Richard Crowley]

Isn't this exactly why I2C bus multiplexers were invented?
Aren't they made specifically for switching I2C bus?  (vs. kludging general-purpose chips)

[mikeselectricstuff]

[SCL is not unidirectional,

How come? Even if there is only a single master on the bus?

Yes even if there is only a single master.  I2C slaves are allowed to manipulate the clock to communicate their current status back to the master.  It's called clock stretching.

..but in practice is only used by I2C slave peripherals on MCUs - I've never seen an I2C device that does clock stretching

[dannyf]

"How to address I2C slaves with conflicting addresses?"

Simple:

1) Don't allow yourself to get into that situation ever.

2) If you can't, life the ground of the i2c devices. I2C bus then applyes only to the device whose ground is grounded.

3) If all fails, refer to 1).

[zapta]

..but in practice is only used by I2C slave peripherals on MCUs - I've never seen an I2C device that does clock stretching

From the LTC2943's datasheet:

"The LTC2943 is a slave only device. The serial clock line (SCL) is input only while the serial data line (SDA) is bidirectional."

[zapta]

Isn't this exactly why I2C bus multiplexers were invented?
Aren't they made specifically for switching I2C bus?  (vs. kludging general-purpose chips)

Any pointer to an actual device?

[Kjelt]

Any pointer to an actual device? 

http://www.nxp.com/documents/brochure/75016529.pdf

[zapta]

Any pointer to an actual device? 

http://www.nxp.com/documents/brochure/75016529.pdf

That's the duck's guts. Thanks.

[AndyC_772]

A 405x mux on SDA should work fine. A start condition in I2C is a high-to-low transition on SDA while the clock is high, and this can't happen if SDA is disconnected. So, no SDA = no bus transactions.

Clock stretching is rare on 'real' I2C slave devices, but it does get used if the slave device is a microcontroller. It takes time for software to recognise the slave address, look up the proper result and load it into the outgoing I2C shift register, and if it's a slow processor, the clock must be stretched.