Last few weeks I spent working on new pin mapping together with @jbb. It continues to be based on serial star topology (point-to-point) between master/CPU/#0 module and peripheral modules since neither many times mentioned here USB and Ethernet unfortunatelly don't fit for purpose. The max. number of periperal modules drops from 7 to 6 (to stay within single 96-pin connector for #0 module), but four general-purpose lines are available for all modules (multipoint) and well as reference clock of 10 MHz and 100 MHz, and SYNC and TRIG lines. Routing differential lines with minimum or no vias was quite chalenging, and I succeed to do that for up to 4 periperal modules. For 5th and 6th modules their point-to-point lines require only one via between top and bottom layer.
New pin mappings looks like this:
As we can see each module has dedicated full-duplex, hi-speed SPI (SCLK, MOSI, MISO i CS) and low-speed (single-ended) IRQ. Depending of module capability two of SPI lines can be used as UART. That of course require that MCU/CPU on the #0 has flexible pins or sort of muxing is implemented. For general purpose signals MLVDS lanes are used (multipoint), where CLK10, CLK100 and SYNC are multidrop. TRIG could be multipoint or multidrop. All of that lanes reqire termination on both ends. One I2C channel is shared between all modules. Additionally NRST (master reset, active low) and NFAULT (active low) are available to all modules.
It's recommended (but still optional) that each module has its own EEPROM connected via shared I2C (SSCL, SSDA) where ifo about module ID, capabilities, usage of bus lines, calibration data, working hours, required firmware/driver, etc. can be stored.
Module's I2C slave address is set with three address pins A0, A1, and A2.
Basic power rails are +5V and +12V, and +Vaux (5V too) is used as backup/standby power that can be sourced via backplane power connector (X5 in schematic below) or from e.g. #0 module. Two pins are assigned for low voltage AC/switched power source that can be used for generating isolated power when module require such thing (e.g. floating power supply module, el. load, etc.). PE (Protective Earth) is also available to each module. Currently using two pins on #0 module and single for other modules. For increased safety/security maybe another one should be added on peripheral modules, too (e.g. A15). PE and GND could be tied together on backplane with an RC element (C5, R20).
Schematic for backplane with 5 modules (CPU/MCU + four peripheral) what I use as an example for PCB routing:
Although backplane should be passive, I decided to put two things on it that is optional but convenient: backplane EEPROM and fan controllers. First one can be used to store some info that is related to chassis (not even #0 module), and second remove needs for extra (and longer) fan cables (that means higher EMI figure) from any of the connected modules. Chosen (
AMC6821) works with two temp. sensors (internal/on-chip and external) and support tacho input on 3-wire DC fan. External sensors are placed on the top edge of the backplane (Q2, Q3).