DIY GPSDO project w/ STM32, TDC7200

[thinkfat]

Hi,

inspired by the discussion on Lars DIY GPSDO, I went on to try a different, slightly more elaborate approach on the topic. I'm not yet sure if it's going to be an actual improval, it's just my take on the topic and it's deviating from Lars Walenius' design in several aspects.

I'm using a dedicated time-to-digital converter chip (TDC7200) instead of the 4046/Arduino ADC TIC, which is pretty ingenious in its minimality but at the same time has some dependencies on component choice (leakage, temperature drift etc). I also decided to use an AD5693R instead of a PWM DAC.

The controller I chose is an STM32F042 in LQFP-32 package. I actually wanted to go smaller but the 03x series has only one UART...

To give the whole thing an initial purpose, the PCB is made so that you can directly plug it into the front connector of an LPRO-101 Rb standard.

I've attached the schematics and a couple of screenshots (top, bottom PCB) if you want to have a look.

The original design was sketched out by forum regular @imo, who I owe greatly for inspiration and giving hints for actual implementation.


The status of the project is:
- first revision of the schematic is complete
- PCB is routed and first prototype has been launched.

I hope it'll work good enough to start with the software integration and to work out the kinks to launch the second revision of the board.

[Leo Bodnar]

Can you sketch a rough area where you want to end up on ADEV or MDEV plot?
Leo

[thinkfat]

The PCBs have arrived meanwhile and I'm assembling them bit by bit. I've put the 12V and 3.3V regulators on and I'm going to check out the STM32 first, making sure that it boots and that I can blink some LEDs.

Next step will be to populate the HC390 and the TDC7200 and making sure that I can talk to it. When that's done, I'll start feeding a 10MHz and 1PPS signal from some GPSDO and see if the measurements make sense, I think that will also give me an idea about the noise floor I can expect.

I've spotted a small problem already, the mounting holes for the LPRO-101 are a bit too far apart, the next PCB revision will correct that.

The next revision will also remove the footprint for the ublox receiver and RF circuitry, I'll replace that with sockets for a ublox breakout board that I've designed, PCBs to come soon.

[thinkfat]

Can you sketch a rough area where you want to end up on ADEV or MDEV plot?
Leo

I have no idea yet. This is an experiment for me. I think the short-term ADEV (tau < 20s or so) will be as good as the LPRO-101 spec allows, it's not the best Rb standard out there, but its pretty ubiquitous. It'll depend mostly on the noise I'm introducing through the opamp that drives the C-Field adjustment, I guess.

For the long-term stability, not sure how I'm going to measure it. My test equipment arsenal is pretty limited when it comes to picosecond deviations.

[iMo]

FYI - the TDC7200 has been elaborated in TAPR-TICC design years back:
https://www.tapr.org/pdf/DCC2016-The_TAPR_TICC_Counter_Measuriing_Trillionths_of_a_Second_with_an_Arduino_John_Ackerman_N8UR.pdf

There are some measurements with ADEVs with cesium in the above pdf.
Rubidium:
http://lists.febo.com/pipermail/time-nuts_lists.febo.com/2019-September/097485.html
https://www.eevblog.com/forum/projects/a-look-at-my-symmetricom-gpsdo-(ocxo-furuno-receiver)/msg1143960/#msg1143960

Also here some detailed discussion:

[thinkfat]

Small update:
- The STM32 works, it boots and I have written a bit of test code, UARTs are OK and it's happily blinking its two status LEDs.
- The input squarer works, it's output is not entirely symmetric, though. It outputs a square wave with about 54% duty cycle.
- I'm not happy with the jitter of the 10MHz signal. It should be fairly stable, I source it from a GPSDO. I suspect the jitter is from the input squarer but I'll check what comes from the GPSDO, too.
- The 74HC390 works and outputs a 500kHz signal to the TDC7200 (which is not yet mounted)
- The 74AC04 creates around 40mV (p-p) ripple on the 3.3V digital supply rail. Good thing the DAC and the output opamp will each have an LDO on their own.
- The 10MHz output (two parallel inverters from the same AC04 through a Bessel Butterworth filter) creates a fairly nice sine wave. I cannot really measure it, but the FFT of my scope suggests that the first harmonic is at least 45dB below the fundamental.

The TDC7200 will be delivered tomorrow. I'll do some more meaningful tests once it's on the PCB. I'll probably not assemble the analog section on this PCB revision, not until I've found out where the jitter on the 10MHz come from.

Current schematic attached.

EDIT: I think the jitter might be through the voltage divider at the input of the AC04-F. The ripple on the VDD rail directly translates to an input bias shift. Maybe a small capacitor parallel to R12 would help.

Update: No, of course a capacitor parallel to R12 won't be good because it's then part of a capacitive voltage divider that attenuates the input signal. However, beefing up the decoupling by exchanging C27 with a 4.7u MLCC worked much better. Also, I see the jitter on the scope only on every _second_ rising edge. Likely a problem of the scope and not actually there. Fedex just delivered the TDC7200 so I'll put that on the PCB and when that's done, I'll be working on the software for a bit.

Update2: Took a closer look at the jitter: It's coming and going in 100ns intervals. 100ns from the trigger point it's there, 200ns it's gone, 300ns it's back. This is a Rigol 1054Z. You may remember the infamous jitter problem they have due to bad PLL loop filter design, what I'm seeing is similar to that issue. I have the software update but we all know it's only a band aid. So I'm going with the assumption that the signal is actually OK and I'm only seeing a scope artifact.

[edpalmer42]

The AC04 can generate pretty substantial current spikes on the +5V supply, depending on what it's driving.  You should consider using a dedicated +5V supply and AC04 for the input sine/square stage and maybe a second dedicated supply and AC04 for the output buffer.

[iMo]

The decoupling caps are not always enough.. An RC (R=10-100ohm) or LC (L=1-10u) may help, even the LC has to be designed with care - not to introduce some resonances increasing the ripple..

[thinkfat]

Alright, small update:

The TDC7200 seems to work fine, the STM32 can talk to it just fine and I'm getting interrupts for completed measurements. I adapted an Arduino library I found on Github and it seems I can configure the chip and retrieve measurement data. The biggest problem was actually translating the Arduino SPI class into opencm3 speak, but going back to the basics and realizing how SPI works at the shift register level brought enlightenment in the end.

The values I get seem to be stable down to the 1ns level, but I have only the debugger connected at the moment and no logging, I have to write a bit of code that spits out the measurements to one of the serial ports so that I can log them and feed them through Octave or something. Frequency and 1PPS are atm. sourced from the same GPSDO, so no wonder they are nicely correlated.

Other news: the PCBs for the Ublox breakout board I designed are back from Aisler, which means I will have a little side project this weekend to populate the board and check if it actually works. Then it's time to think about improvements for the next PCB revision.

[thinkfat]

The decoupling caps are not always enough.. An RC (R=10-100ohm) or LC (L=1-10u) may help, even the LC has to be designed with care - not to introduce some resonances increasing the ripple..

I think I'll play safe and go with an RC. I might be able to squeeze in a small tantalum capacitor, too. I think I can even prototype it, I can cut the VDD trace on the bottom copper and bridge it with a small resistor and then check what additional capacitance I might need. But first I want to log a couple hours of data with the existing setup to have a benchmark.

[thinkfat]

The AC04 can generate pretty substantial current spikes on the +5V supply, depending on what it's driving.  You should consider using a dedicated +5V supply and AC04 for the input sine/square stage and maybe a second dedicated supply and AC04 for the output buffer.

I don't think I have enough space to fit another two AC04. But if there are single AC inverters or NANDs, that might be an option.

[thinkfat]

First raw data set, scale 1ps, 1 sample per second.

[iMo]

835ns w/ 173ps_rms (first 20k). What have you measured?

[thinkfat]

835ns w/ 173ps_rms (first 20k). What have you measured?

These are just the raw measurements from the 1PPS pulse rising edge to the next rising edge of the divided-down clock, sourced from the same GPSDO. I want to use them as a benchmark for future improvements. I'll modify the AC04 supply, adding a small resistor into the supply rail, then run the measurement again to see if there's an improvement.

Mode 2 measurements, 10 calibration cycles, 1 stop event, no averaging.

[iMo]

It means you generate "1PPS" from the OCXO's 10MHz clock?

[Leo Bodnar]

There are some nasty outliers in there.  They need removing before applying any statistics.
Leo

[iMo]

835ns w/ 173ps_rms (first 20k). What have you measured?

Therefore I took only first 20k samples. It also depends where the 1PPS comes from.
173ps rms seems to me rather high. I got about 120ps on a solderless breadboard while measuring 100ns pulse off my OCXO (as my benchmark).

[thinkfat]

It means you generate "1PPS" from the OCXO's 10MHz clock?

Not exactly sure how the GPSDO creates the 1PPS signal. It's one of those UCCM telecom modules, this particular one was made by Trimble.

I noticed the outliers as well, when removing them I get a mean of 835.13ns and standard deviation of 16.295ns

[Leo Bodnar]

Note how things are warming for the first ten minutes.  Perhaps, strip them from reference run as well.
All outliers are at the end of the run (beyond 6 hours).  It may be that one of the edges has drifted into some metastability zone.
What does 835ns represent?
Leo

[iMo]

For measuring the TDC7200 and the circuits around do not use 1PPS from an external source!
Divide the 10MHz OCXO (the same OCXO you are using for TDC7200 and 500kHz) to 1Hz, and feed it to 1PPS input.
Invert the 500kHz when you get small readings (you will get either a few ns readings or 1us readings).

PS: perhaps an improvement for the next pcb revision - it is nice to have a chance to invert the 500kHz phase coming to the TIC - for self measurement purposes..

PPS: you cannot get 16ns rms, with first 22k samples (no outliers there) you get 173ps rms.

[thinkfat]

The 835ns have no significance. It's just what the phase relation between the 1pps pulse and the 10Mhz signal happen to be, including the propagation delay through the AC04 and HC390.

[iMo]

The propagation delay through 04 and 390 is 20ns. So the question is where the 1PPS comes from? An external source? Or you have used the same OCXO divided by 10mil as you are using for 500kHz? As I wrote above - do not use an external 1PPS for self diagnostic test. See my picture above.

PS: another self test would be to feed the 1PPS with 500kHz (off the "stop wire"), passed through an inverter such you get 1us start-stop difference. You should get aprox "1.000.000ps" readings, with stddev below 100ps (~60ps ideally), no outliers, hopefully.

[thinkfat]

For measuring the TDC7200 and the circuits around do not use 1PPS from an external source!
Divide the 10MHz OCXO (the same OCXO you are using for TDC7200 and 500kHz) to 1Hz, and feed it to 1PPS input.

I had hoped that using the 10MHz and the 1PPS from the same GPSDO would be just that. But it is a 'maybe' I should seek to eliminate.

I'll hook them both up to a scope and take a look.

[thinkfat]

PS: another self test would be to feed the 1PPS with 500kHz (off the "stop wire"), passed through an inverter such you get 1us start-stop difference. You should get aprox "1.000.000ps" readings, with stddev below 100ps (~60ps ideally), no outliers, hopefully.

Yep, I will try that. I was thinking of using the spare dividers in the HC390 to create a correlated start signal. But using an inverter is just as good.

[thinkfat]

No time yet for big modifications, but I tried something else: I used an external squarer. Result attached, raw data, like the previous one.

Just for kicks I've added an Allan variance deviation plot.