digital buffer delay components

[john23]

Hello,I am using 74ABT04 HEX inverter to create a good high quality delay and pulse rise and fall.
However when i cascade 4 of them i get only 6ns delay from the input and output as shown below.
Is there some digital buffer component which will create a delay of 50ns for example?
Thanks.

[TimFox]

There are packaged devices that use an L-C delay line between buffers.
There are also programmable and tapped delay lines.
https://www.mouser.com/c/semiconductors/integrated-circuits-ics/clock-timer-ics/delay-lines-timing-elements/

[ajb]

How accurate does the delay need to be? 

You could add an RC delay between your existing buffers, but that might not be practical for a very precise/stable delay in a real circuit.  You'd also want to use schmitt-trigger inverters (74x14) rather than 74x04. 

[edavid]

First of all, don't expect a simulation (or solderless breadboard prototype) to be accurate here.

Second, 74ABT is just too fast for this.

Use a slower logic family - 74HC is probably best.  Build a dead bug prototype.

A bonus is that you can tune the delay by adjusting the supply voltage.

[PCB.Wiz]

Hello,I am using 74ABT04 HEX inverter to create a good high quality delay and pulse rise and fall.
However when i cascade 4 of them i get only 6ns delay from the input and output as shown below.
Is there some digital buffer component which will create a delay of 50ns for example?

LOGIC delays are spec'd at some load capacitance, and they have large spreads from MIN to MAX.
How accurate do you need the 50ns and does it need to track CMOS temperature variations ?

You can get 50ns with schmitt and RC elements, with some caveats.

• It needs a clean drive pulse, so may need the RC element between schmitt gates.
• A simple RC delay needs a settling time before being reused, otherwise the off time can modulate the on time.
• It would need calibrate in circuit, as PCB and stray C will be important.
• It should use the same vendor part in production