I remember one design where decreasing the decoupling values reduced EMC because the series inductance combined with the lower capacitance produced a null at the frequency of operation.
The fact people sometimes see mild successes by decreasing C also keeps feeding the myth of smaller C having any advantage. You can see this in my above post where I posted two links; both show a very narrow region right at SRF where the impedance is lower than that of the largest capacitor. So yes, the smaller cap gives better HF performance but only at that very narrow frequency band.
The problem is the narrowness of this dip, and it being dependent on unit-to-unit variation, DC bias, temperature and ageing of the capacitor. Therefore, if such change to smaller capacitance value makes the EMC pass, the result is not valid as it depends on that exact part found at the lab. Lab of course writes the report for you, and for self-certified stuff, if you don't understand what happened, then no one cares even if your product is in reality non-compliant, until someone does independent testing.
If you look my second link, you can kinda see that if you wanted a modest say 3-5dB improvement over wide band, you would need to parallel not 3 but 10-15. maybe 20 different capacitor values! This is obviously impossible because you could not physically fit them close enough. So aiming for SRF dip is not going to make it; instead the correct way for the improved high-frequency attenuation is lower the ESL i.e., use a smaller part and/or better layout, or paralleling multiple caps (the same part number!) if layout enables this.
Ignoring EMC, see below, one way to calculate the minimum decoupling value is by how much charge the IC is switching. The ratio of charge stored in the coupling capacitor and the load determines how much voltage ripple will be produced. I found that this gives very accurate agreement with measurements.
Excellent and simple way of thinking, I like it. I regularly use this approach when choosing power bypass cap or bootstrap cap for gate driver ICs, knowing the Qg_tot of the MOSFET. Make the capacitor 100x or so. Same thing when using simple RC filter to provide low impedance for SAR ADCs for those slowly moving inputs you won't want to spend an opamp for; use 1000x the internal sample&hold capacitor (again a simple datasheet value) for roughly 10-bit performance.