Regarding 100nF, it's really the "bare minimum" value. Given DC bias, temperature, tolerance and aging, let's say it goes down to 50nF. Then, at 10MHz, which is a relevant figure because it's tested for EMC and it's well within the edge rate capability of microcontroller / logic IC IO, impedance is
1/(2*pi*10e6*50e-9) = 0.32 ohms,
which means a switching current peak of 1A would cause 0.3V voltage drop due to used charge from that capacitor, which then the upstream power trace would then try to supply, limited by its inductance, causing a dip in the supply voltage and then opposite overvoltage peak (ringing). Now this doesn't seem too bad but redo the calculation with 10nF and you start seeing why I suggest the classic 100nF is the "bare minimum" which works in most cases fine but does not have much margin. Therefore, I second the recommendation you often hear from EMC experts, use 1uF as your default bypass cap if you can get it in the same package size you would use with 100nF.