Circuit help - digital output driver

[codeboy2k]

Great job! nice looking board too..

congrats @ 2.2 Gigavolts / second slew rate 

[c4757p]

congrats @ 2.2 Gigavolts / second slew rate 

I was torn - V/ns sounds more professional, but GV/s sounds more badass. Who doesn't want to say they are legitimately working in GIGAvolts *cough*pernanosecond*cough*?  But I went with V/ns... (Edit: I'll let you know when I achieve 1 GV/ns. I expect some sort of award.)

I may have to do some selection of transistors. The second board isn't quite as fast, and the only thing that could possibly vary between them is that 2N2369A (the same transistor used for avalanche in the Jim Williams pulsegen). It's an incredibly fast switcher - that waveform is generated by operating it as a saturated switch (with a very hard base drive and a load just under I_C(max)).

Also, I think the waveform could be made a bit cleaner with a couple "bodge diodes", which I may investigate. Sadly I only made two boards - don't want to bodge up one of them if I end up not using the bodge. It's also a tricky bodge because it's in the high speed signal path. I'd be mouting LL4148s directly onto the surface.

Things I would change if I did another revision:
- Variable V_LOW. That way both channels could be used in tandem to output one LVDS signal, or a channel could output near proper RS-232 levels, or whatever. Easy enough without a redesign - just float the section before the output amp. I don't mind a bit of level shifting; I have a nice, working design that I don't want to screw around with.
- Variable edge speed limiters, by switching capacitors onto an RC filter before the output amp. The trick is attaching a filter that doesn't limit the maximum speed when switched off.
- Integrate those bodge diodes.
- High speed op amp for gain. I'd still use the 2N2369A to get the switching waveform; it's really fast. That should increase the maximum voltage and remove some of the distortion at high output voltages.
- The input buffer section can be simplified because of the drive strength of the LVDS receiver. It's a holdover from when the design had a 50 ohm input.
- Tell the edge connectors to piss off. I naively thought they'd be cheaper because I don't need both male and female connectors. *snort*

Anyone think I should respin the PCB? Or just be happy with what I've got and move on to the rest of the system? I'm too much of a perfectionist sometimes...

[c4757p]

D'oh! After working a bit on the rest of the system I came back to this, ready to experiment and find places to adjust to clean up the output waveform. Turns out I just had a dodgy termination! All is good. (Even that little bit of ringing at the bottom appears to be due to the still-imperfect termination - the cable rings at the same frequency if I take off the cap.)

I may have to find a place to add a switchable slew rate limiting capacitor, though. Perhaps as simple as a varicap - I can bodge it in quite easily without disrupting the signal path. It would be nice if the signal weren't so sensitive to termination when I don't need the fast edge speed.

(The slower edge speeds are on the other board, with a different transistor. They appear to vary quite a bit. I'll take some time tonight to select the fastest ones.)

Follow-up: I wasn't sure how well such a simplistic method would work, but the attached diagram worked quite well as an edge time-limiting addition, limiting the edge to about 16ns when enabled and having no noticeable effect when disabled.

[codeboy2k]

excellent work!

That's a nice clean signal there 

For someone who started out saying you are out of your league here, you have created an awesome driver stage (<5ns rise/fall is way better than some professional pulsegens out there)

Now you  can move onto the pulsegen part.

With those rise/fall times you can easily reach 50-60Mhz..maybe 80 Mhz if everything else has the bandwidth to get there too.  100Mhz would be double awesome, but that's pushing it just too much

[c4757p]

Thanks for the input! Yes, I was quite pleasantly surprised to see how much cleaner the signal was with a better terminator. (It was pretty much perfectly clean on my 2445A with internal termination, but I figured the bit of nastiness was just being knocked down by the lower bandwidth.) The limiter works nicely too - I was expecting to have to do something a bit more sophisticated. I wanted a varicap - easier bodging - but didn't have anything with an appropriate capacitance range.

The rest of it will be easy, it's all digital and FPGA-based. I have a lot of the design for that complete already. Despite being of the opinion that digital electronics is more boring than watching paint dry, I'm rather good at it so I shouldn't have problems with that.  And I'm going to etch the board for the power supply tonight.

[c4757p]

For someone who started out saying you are out of your league here, you have created an awesome driver stage

I've always learned that way - bite off more than I should try to chew, and then gulp it down anyway. More because I'm a stubborn ass than because I think it's a good way to learn