Dave's Clock

[neo]

 So i tried to get Dave's clock schematic accurate to pin numbers, did i do it right? or did i miss something and spend all that time banging my head against a wall doing this in error. Please anyone let me know if its right i already bought a vfd display for it. also the line of things under the vfds are transistors, the standard symbol wouldn't fit

[EEVblog]

I make no guarantees as to the accuracy of my schematic!

[neo]

and i especially make no guarantees to my replica im just asking if it looks right, hi dave big fan

[neo]

you will also note a little 555 timer circuit in that schematic that is my planned clock unless its a stupid idea i ran the numbers and with a 10 turn pot the accuracy seems fine.

[obiwanjacobi]

What does Q30 do?

[neo]

obi, thats part of the nor gate. by the way thanks you drew my attention to a missing wire in the schematic

[void_error]

The 555 wouldn't be good enough. The oscillation frequency will drift with temperature, depending on what timing components you'll use.
Try a CD4060 with a 32.768kHz crystal instead.

And speaking of clocks, I almost want to design and build one just for fun.

[neo]

void error, is 20 ppm good enough? and does the rest of it look fine?

[neo]

 Well i got tired of trying to make sure dave's was right so i went and designed my own, perhaps taking note from other tries but largely my own. 20 ppm frequency drift on Y1

[neo]

What do you think of it?

[neo]

Well i got tired of trying to make sure dave's was right so i went and designed my own, perhaps taking note from other tries but largely my own. 20 ppm frequency drift on Y1

Is that "1" at AB4 meant to be 1Hz?
The yellow lines are hard to read and I suspect they won't print well monochrome.
What are the transistor arrays, and transistors?
What sort of display are you using. Is there another page for that and the power supply?

 

In order, yes small typo
yellow lines are for reference in drawing it only thanks for your concern on the printing of it
transistor arrays are drawn that way to save space their just regular MPSA42 transistors to power my vfd display
the power supply itself is going to another page for simplicity's sake

[neo]

and in answer to a question not yet asked the z1 and z2 are the shortcut to the #6 reset circuit at the bottom again to save space and make schematic simpler

[void_error]

void error, is 20 ppm good enough? and does the rest of it look fine?

20ppm means that your clock will be off by roughly +/- one minute every month, worst case.

[VinzC]

Might be too late but for a digital clock I'd recommend using mains as the clocking signal as the frequency is pretty stable.

[void_error]

Might be too late but for a digital clock I'd recommend using mains as the clocking signal as the frequency is pretty stable.

That's how a lot of those cheap mains-powered clocks do it. They also use a dedicated clock chip and some have a 9V backup battery that runs the clock without the power-hungry LED display when mains power is cut off, and usually run off an RC oscillator. I remember taking one of those clocks apart several years ago.

[neo]

Might be too late but for a digital clock I'd recommend using mains as the clocking signal as the frequency is pretty stable.

only problem with that is im at the end of the line so its no better than a crystal, but thank you i did pursue that line of thought but i came up about even stability between the two

[neo]

or at least with a crystal i have a known variable